how to start a multicycle process correctly

hi, i would do a large bit subtractor with a multicycle process to relax setup timing.

when i receive new data to be subtracted(A ,B), i store them in 2 registers clocked @ 100MHz. Once i have stored these values, i would start the multicycle process to do the subtraction @ 25MHz.

How i code the start signal that goes from the 100 MHz process to the multicycle process correctly? i have applied the constraint from the altera clock enable multicycle example:

# Setup multicycle of 4 to enabled driven destination registers

set_multicycle_path 4 -to [get_fanouts [get_pins enable_reg|q*] -through [get_pins -hierarchical *|*ena*]] -end -setup

# Hold multicycle of 3 to enabled driven destination registers

set_multicycle_path 3 -to [get_fanouts [get_pins enable_reg|q*] -through [get_pins -hierarchical *|*ena*]] -end –hold

i see in time quest that the path from the start signal to the multicycle process is included in the slow path, but i think it should be analyzed in the fast domain...

process(clk 100)

begin

if rising_edge(clk100) then

if new_data = '1' then

a_reg <= A;

b_reg <= B;

start_sub_process <= "1111"; -- How should this signal be done?

else

start_sub_process <= '0'&start_sub_process(2 downto 0);

end if;

end if,

end process;

sub_proc : process (clk100)

begin

if rising_edge(clk100) then

if enable_reg='1' then

if start_sub_process(0) = '1' then -- path from start_sub_process to multicycle process is analyzed in 40 ns

out_sub <= a_reg - b_reg;

end if;

end if;

end if;

end process;