Honored ContributorI need to input a video data and a clock from external.This clock will be used as a global clock. but there isn't dedicated clock input IO between FPGA and daughter card. Can I just use common data io as a clock input port?
Honored ContributorThat's not a very good design...
But yes, you can try to use a general I/O pin for clock, but it will make it harder to meet timing requirements.Honored Contributorhi Rbugalho,
thanks for reply. Do you mean that the schematic is not a good design?Honored ContributorYes.
It's important to use the FPGA's clock input pins for clocks. Put simply, the global/regional clock distribution networks can't be driven by generic I/O pins. Neither the PLLs. For more details, read the Stratix III's handbook chapter on clocking resources. Depending on your need, you might get away with it and make it work. But sometimes, it's just impossible to meet timings with clocks coming from generic I/Os.
