How to do with unconstrained paths which is introduced by the JTAG and GSFI IP?

For JTAG related, i have just resolved it per below link, please focus on the rest two which related to the GSFI IP when you answer,

thank you.

Solved: Re: how to set timing constraint for jtag port - Intel Community

Do you mean "QSPI"? I don't know what "GSFI" is. It looks like you have unconstrained clocks in your design. You need to constrain them in your .sdc file.

hi,

GSFI means "Generic serial flash interface", which is a control interface IP to the QSPI flash,provided by Intel.

I instantiated it in my design to access my QSPI flash, and i found the 2 paths which were reported unconstrained are related to this IP.

For clocks in the customized logic, i added the constraints by myself; for most IP such as DDR controller, the constraints are added automaticlly; but i don't know why this IP report this warning, shall the user add the constraints by themselves?

below attached is my HPS system and the GSFI is red highlighted.

thanks.

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