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Pack_of_lone_wolves's avatar
Pack_of_lone_wolves
Icon for Occasional Contributor rankOccasional Contributor
2 years ago
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How do I do line by line timing analysis in Quartus Prime Timing Analyzer?

I am familiar with the following timing analysis flow: Write an HDL design file (mostly .sv or .v). Simulate it. Integrate it into the project. Do synthesis, Fitter. Open timing analyzer -> Se...
Hdl
Timing
  • SyafieqS's avatar
    SyafieqS
    2 years ago

    I understood your intention however I don't think Quartus able to do that. In Quartus failing path only shown in STA report as it is, If you need the path b/w of the failing, (seem like a chain path of that node). you probably need to manually report timing (playing with from/to of intention node to manually compare it which I think bit tedious).

    Let me know if there is any concern.


SyafieqS's avatar
SyafieqS
Icon for Super Contributor rankSuper Contributor
2 years ago

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to https://supporttickets.intel.com/, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


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