Forum Discussion
Occasional ContributorHow do I do line by line timing analysis in Quartus Prime Timing Analyzer?
I understood your intention however I don't think Quartus able to do that. In Quartus failing path only shown in STA report as it is, If you need the path b/w of the failing, (seem like a chain path of that node). you probably need to manually report timing (playing with from/to of intention node to manually compare it which I think bit tedious).
Let me know if there is any concern.
Super ContributorYou can't right click a node in the RTL viewer and locate back to the failing path in the Timing Analyzer.
All the options available can be seen when you right click > Locate node.
Regards,
Richard Tan
Occasional ContributorI do not want to locate back to the failing path. I am aware of the available options visible once the right click > locate node is done.
What I want is to select any path and I want to see the overall combinational delay through the path b/w any two nodes (irrespective of the path is failing or not), (the nodes could be two or more FFs or Adaptive LUTs or Adaptive LMs), so that I can tweak the HDL code and compare the changes in the delay values before and after change.
I am aware that some delay values can be seen in Chip Planner. But I have always found those delay values once I select a path / a node in Timing Analyzer and do the locate node in Chip Planner.
Getting delay values from RTL/Tech Map viewer on any path whatsoever will help in making more timing aware design changes which expedite the overall design cycle.
