Altera_Forum
Honored Contributor
16 years agoError in Synthesis of ddr3 controller with a NiosII on StratixIV
Hi,
I am getting the following error while running for StartixIV using Qaurtus2 9.1: error: the datain input of delay chain primitive "altmemddr_0:the_altmemddr_0|altmemddr_0_controller_phy:altmemddr_0_controller_phy_inst|altmemddr_0_phy:altmemddr_0_phy_inst|altmemddr_0_phy_alt_mem_phy:altmemddr_0_phy_alt_mem_phy_inst|altmemddr_0_phy_alt_mem_phy_dp_io:dpio|altmemddr_0_phy_alt_mem_phy_dq_io:dqs_group[2].dq[5].dq_pad|gen_dq_input_with_deskeq.dqi_t1_delay" is driven by the o output of an i/o input buffer primitive that has too many fanout. when the datain input is driven by the o output of an i/o input buffer primitive, that output can only have one other fanout to a directin input of a half-rate input primitive. This is a design with the NiosII processor, on chip memory and high performance II DDR3 controller. Any Suggestions?? -Sid