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Altera_Forum
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15 years ago

Error in Synthesis of ddr3 controller with a NiosII on StratixIV

Hi, I am getting the following error while running for StartixIV using Qaurtus2 9.1: error: the datain input of delay chain primitive "altmemddr_0:the_altmemddr_0|altmemddr_0_controller_phy:a...
Altera_Forum's avatar
Altera_Forum
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15 years ago

Hi, Sid. I have seen this error before, but it was awhile ago. I don't remember the exact cause, but I think it was one of two things. Either (1) the dq output (in your case, I think dq[5]) was not used and so synthesis deleted some logic, or (2) I specified the data mask (DM) signal as part of the dqs_group (in your case, dqs_group[2]) when, in fact, when I built the memory controller I had told the megawizard to not drive the DM pins. Sorry I can't be of more help.