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danield17's avatar
danield17
Icon for New Contributor rankNew Contributor
1 year ago

Error 23098 when compiling Agilex5 GTS PCIe

I tried to create a design with PCIe GTS IP core and SSGDMA on Agilex5 but I got the following error: One or more blocks are configured incorrectly and will not have the desired functionality. -...
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Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi,

May I know which Quartus version that you are using ?

Can you please regenerate the same design in Quartus v24.3 onwards and see if you are still able to see the same error ?

Based on my experience these errors are caused by an invalid combination of reference clock frequency and operating bit rate.
It happened in Quartus v24.1 and v24.2..
These combinations had removed in Quartus® Prime Pro Edition Software v24.3 onwards.

By right it shall work well when you try v24.3.

Regards,

Wincent_Altera

danield17's avatar
danield17
Icon for New Contributor rankNew Contributor
1 year ago
Hi,

I am using Quartus v24.3.
I have currently selected PCIe gen4 x4 with 256-bit interface and a reference clock of 350MHz.
Hopefully, this information helps in understanding the issue.

Regards,
danield17