Forum Discussion
Hi,
I have checked with Quartus 17.0 STD and 18.1 STD run power Analyzer during compilation option is NOT Grayed Out.
Can you delete db and incremental_db folder and add set_global_assignment -name FLOW_ENABLE_POWER_ANALYZER OFF line in your .qsf file and try.
Try by creating new project.
If possible can you share your design let me try from my side.
Regards
Anand
- NM87 years ago
New Contributor
Hi Anand,
Thanks for the inputs.
I tried after deleting db and incremental db, I see it still grayed and giving the same error after compilation.
Would it be an issue with My licence ?
As I'm trying to compile it with 30day free licence available in the tool.
Please find the attached design archive.
Thanks & Regards,
Nanjunda
- AnandRaj_S_Intel7 years ago
Regular Contributor
Hi Najunda,
Would it be an issue with My licence ?
No.
By checking i found that
- In MAX 10 SA/SC family device the run power Analyzer during compilation option is Grayed Out (meaning always enabled).
- And also i can compile the project successfully using Quartus STD 17.0,17.1 &18.1.
Regards
Anand