Forum Discussion
Elaboration of entities that are generated take very long time
- 6 years ago
So I had the opportunity to move our build machine to a Intel Proessor machine which makes my synthesis step roughly 50% faster, the fitter step not 50% but still remarkably faster. If you guys stumble over this post with the same issue, please drop a line in this thread in order to show Intel this is an issue.
I will however stop investigation here since I am happy with this workaround.
@KhaiChein_Y_Intel I am not allowed to share this design since it is under NDA Agreement sorry.
Can you post any code? That might help to figure out what's taking so long just for elaboration, which is normally pretty quick.
#iwork4intel
This is the part that generates all the entities, ADDR_ARRAY and ACT_READ_ACCESS_IND_ARRAY are both arrays that define the configuration of the entities. ASYNC_IN_PORT_MAPPING and ASYNC_OUT_PORT_MAPPING are Arrays containing the signals that can be read or written by accessing the respective adresses. The whole thing basically defines a adressable registerbank. I know it could be done with a Dualport RAM, but for now we have this solution and need to speed the build process up.
ASYNC_GEN: for i in 0 to (NBR_ASYNC_PORTS-1) generate async : entity work.IF_ASYNC_PORT_V2 generic map( ADDR => ADDR_ARRAY(i), ACT_READ_ACCESS_IND => ACT_READ_ACCESS_IND_ARRAY(i)) port map( nRESET => nRESET, CLK => CLK, CTRL => s_ctrl_clk, DATA_IN => s_em1d_in_clk, DATA_OUT => EM1D, nOE => nEM1OE, DATA_FPGA_TO_DSP => ASYNC_IN_PORT_MAPPING(i), DATA_DSP_TO_FPGA => ASYNC_OUT_PORT_MAPPING(i), READ_ACCESS_INDICATOR => ASYNC_OUT_READ_ACC_INDICATOR(i) ); end generate ASYNC_GEN;
- sstrell6 years ago
Super Contributor
The only thing that seems odd is the way you're referencing the entity you want to instantiate each loop:
async : entity work.IF_ASYNC_PORT_V2I don't know if maybe Quartus is searching the whole work directory (the project directory) each iteration of the loop to try to find this and that is what is slowing things down. If the file that contains this entity is already in the project directory (or referenced using an IP search path in Quartus settings), then maybe try just:
async: IF_ASYNC_PORT_v2
Or perhaps you need LIBRARY and USE clauses at the top of this design file to point to this.
Some things to try.
#iwork4intel
- avk6 years ago
New Contributor
Hi,
Thanks for your reply. I tried to move the component into a package and made it available with a "use". Although it makes the project tydier, it did not help to speed up things. I however suspect now something else to cause this: I think, the big Arrays that are used to assign the signals to this component slow everything down. Will try with a smaller batch of entities first to see if this makes it faster. Keep you posted...