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matferronato's avatar
matferronato
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2 years ago

Early timing analysis + Intel's IP

Hello, I updated Quartus Prime Pro to version 23.4, which gives me access to the Early Timing Analysis using RTL-on-SDC files. The majorities of my clocks are defined by the sdc files automatically...
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Timing
matferronato's avatar
matferronato
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2 years ago

Hi TingJiang, thanks for the answer.

My problem happens during early timing analysis following the dni flow on quartus 23. Can you please explain your suggestion a little further?

Timing analyzer currently does not fetch the correct clocks from the ips sdc files. I cannot see the pcie clock being loaded.