Debugging Current State in Simulation (VHDL/Quartus)?

Because you declared your own state, you always know what state it is in, because you decalred it.

Yes, of course I know what the state explicitly SHOULD be according to how I designed it, but I think it would be helpful to be able to explicitly show what state I am in on the vector waveform/simulation results at every point, to troubleshoot why certain outputs don't go high, etc.

When you say explicitly, do you mean an actual encoding rather than just the state name? like "110101" instead of "state1"?

I'm using the quartus simulator. What I'm saying is that just as you are able to add outputs and inputs to the waveform trace when you run a simulation, I was wondering if there's a way to create an output that outputs the current state's name or the current state; I would imagine that it might just output the current state's encoding (since quartus provides encoding even if you give state names) as an integer/bit vector.. but I'm not sure.

Sorry I dont know about the quartus simulator (due to be dropped in Q10 btw). In modelsim you just pick up the state signal and drop it on the wave window and watch the state change.

With default "one hot" encoding, you actually need to display a bit for each state, it's the same e.g. in SignalTap debugging. But I don't understand, why you create an output signal. You can simply include the internal state registers to your simulation waveform.