Debugging Current State in Simulation (VHDL/Quartus)?

I'm using the quartus simulator. What I'm saying is that just as you are able to add outputs and inputs to the waveform trace when you run a simulation, I was wondering if there's a way to create an output that outputs the current state's name or the current state; I would imagine that it might just output the current state's encoding (since quartus provides encoding even if you give state names) as an integer/bit vector.. but I'm not sure.