DE2 (cyclone2 EP2C35F672C6) can compile successful but cant run on board

An HDL file is *not* sufficient. You also need to tell Quartus what pins LEDR and SW are on the FPGA, otherwise Quartus assigns a couple of random pins.

Use the Pin Planner to view the pins used on the FPGA.

I posted a DE2 example design in this thread:

http://www.alteraforum.com/forum/showthread.php?t=33462

Take a look at it. Look at the pin constraints file, and look at your schematic. I believe there are a couple of revision of the DE2 board, so check the schematic for your design against the list of pins and see if they match. If they do, then run the synthesis script and download it.

You can then use that design as template (its in VHDL), or you can convert it to Verilog.

Cheers,

Dave

Actually I did pin assignment by import the DE2_pin_assignments.csv.

It did work when I applied on Quartus 10.1

Actually I did try to assign the pins manually with pin planner. And, it did work.

I wonder whether the .csv file I used is not compatible with the Quartus 12.1

--- Quote Start ---

Actually I did pin assignment by import the DE2_pin_assignments.csv.

It did work when I applied on Quartus 10.1

Actually I did try to assign the pins manually with pin planner. And, it did work.

I wonder whether the .csv file I used is not compatible with the Quartus 12.1

--- Quote End ---

You should be able to check with the Pin Planner whether the assignments for those two signals are correct.

Cheers,

Dave

Problem Solved. I have found the de2 pin assignment .qsf in altera website (de2 pin assignment development kit> search for the qsf file). It just same like what you posted in previous.

By import it to the design, it works with all pin assignments.

Thanks for your help. Good day

Excellent! Glad to hear you got it working.

Cheers,

Dave