Altera_Forum
Honored Contributor
10 years agocreate_generated_clock question
Hi all!
I have a 120MHz clock coming into my design. I use this clock on register (called CLK_60) to divide it by 2, to create a 60MHz clock. I believe I have constrained things correctly, but I get a warning that CLK_60 was found without an associated clock assignment. Here's what I have in my .sdc: create_clock -name CLK_I_120 -period 8.33333 [get_ports CLK_I_120] create_generated_clock -divide_by 2 -name CLK_60 -source [get_pins CLK_60|clk] Can anyone tell me where I might be going wrong? Thanks!