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Altera_Forum
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11 years ago

create_generated_clock question

Hi all! I have a 120MHz clock coming into my design. I use this clock on register (called CLK_60) to divide it by 2, to create a 60MHz clock. I believe I have constrained things correctly, b...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

I realized I did not add the target to my.sdc file.

So I changed the line to: create_generated_clock -divide_by 2 -name CLK_60 -source [get_pins CLK_60|clk] CLK_60

That fixed things, and taught me that proper caffeine levels should be achieved before attempting to write constraint files.