Forum Discussion
Altera_Forum
Honored Contributor
11 years agocreate_generated_clock question
Hi all! I have a 120MHz clock coming into my design. I use this clock on register (called CLK_60) to divide it by 2, to create a 60MHz clock. I believe I have constrained things correctly, b...
Altera_Forum
Honored Contributor
11 years agoHi Awann,
You do not tell which clock has to be used as the source for the generated clock. You may try this: create_generated_clock -divide_by 2 -name CLK_60 -source [get_ports CLK_I_120] [get_pins CLK_60|clk] Grtz, Richard.