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ymiler's avatar
ymiler
Icon for Contributor rankContributor
2 years ago

clock missing

Hi,

I have defined several clocks for my design, but the tool has removed some of them.

Quarus (ver 22.3) found these clocks, but I'm unsure why they are not included in the final clock list.

I'd like to share the "fit.plan.rpt" file with you, as there are some comments regarding these clocks that I don't understand.

Could you please provide me with a link to upload the file? ( file size is 4GBytes)

Hdl

5 Replies

  • Nurina's avatar
    Nurina
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hi,


    Could it be that the SDC is being ignored? Try reporting "Ignored Constraints" in Timing Analyzer to see if they are being ignored.


    Let me drop you an email and see if you can send it through there.


    Regards,

    Nurina


    • FvM's avatar
      FvM
      Icon for Super Contributor rankSuper Contributor
      2 years ago
      Inputs that are acting as actual clock won't be removed, no matter if they are correctly constrained. Clocks are removed (like other logic) if no design output depends on it.
      • ymiler's avatar
        ymiler
        Icon for Contributor rankContributor
        2 years ago

        I found the issue,

        I got a critical error:

        " Ignored create_generated_clock , Argument -source is a collection with more than one object. "

        It needs more investigate since my ENV includes Synplify Premier for synthesis and Quartus for P&R

        Synplify Premier show me the clock definition correctly but the production files for Quartus include constraint with

        more than 1 source objects.

        Maybe I should check it with Synplify support team.

  • Nurina's avatar
    Nurina
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hi,


    I'm not sure if you can consider editing the constraints yourself, but it sounds like the constraint is targeting more than one source. Here are some examples for create_generated_clock:

    https://www.intel.com/content/www/us/en/docs/programmable/683243/23-3/creating-generated-clocks-create-generated.html

    https://www.intel.com/content/www/us/en/docs/programmable/683243/23-3/clock-divider-example-divide-by.html

    https://www.intel.com/content/www/us/en/docs/programmable/683243/23-3/clock-multiplexer-example.html


    Regards,

    Nurina


    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.


  • Nurina's avatar
    Nurina
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hi,


    We have not received a reply from you. As such, I now transition this thread to community support. If you have a new question, Feel free to open a new thread or login to ‘ https://supporttickets.intel.com ’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

    If any answer from the community or Intel Support are helpful, feel free to rank your support experience by rating 4/5 survey. Please let me know of any inconvenience so that I may improve your future service experience.

    Have a great day!


    Best regards,

    Nurina