Cannot create an Internal Memory Initialization (.hex) File

Hello, Daixiwen!

Thank you for your patience and inspiriting advices. Of course, I will study the SignalTap chapter and try to do you advised.

Now how my experiments are fulfilled.

I use the Nios II Hardware Device Tutorial Design Example.

At first I strictly followed the tutorial - developed the hardware project, the Qsys project and then the Nios II SBT for Eclipse project - count_binary. Then I used <project>(right click)->Run As->Nios II Hardware.

As I can guess the compiled and linked application file (.elf) is loaded into the onchip memory and then leds begin to blink and the console window displays numbers from counter.

I modified the projects - inserted the buttons and edge-sensitive interrupts and made a little C-code change - to provide the program exit after the button 2 was pressed.

Everything works fine if "Run As" is used.

My board is tied to my PC by the USB-blaster cable. Sometimes earlier I got messages about time-limited project used and then was to recompile the hardware project..

So I tried to create my own projects similar to the origin ones.

The hardware and Qsys projects were created. But the software project is still not ready because I must learn how the HAL BSP can be created in order not to use the count_binary template.

Everything last created works fine in the "Run As" mode. No messages concerning time limits are sent.

Unfortunately any attempt to get the .hex and the new .sof files fails - the new .sof file downloads but all leds begin to shine permanently as if the old .sof was downloaded.

Sorry for the not formatted tables in the last message. In the Quick Reply window the tables were displayed correctly but after posting their data blended.

Regards,

tduty

Hello, benc!

I've done you advised but nothing changed.

To be able to save the .hex file after it's opened and the word size is changed to 32 I was to change a symbol in the file and then to restore it. Without it I could not save (unchanged) file.

By the way I noticed the meminit.qip file contains the only string, i.e.

set_global_assignment -name SEARCH_PATH $::quartus(qip_path)

Is it enough for Quartus compiler to find the necessary .hex file?

Regards, tduty

You should check the settings for the internal memory block in QSys. It's there that you indicate that you want to use a .hex file, and its name.

IIRC the .hex file needs to be in the project's main folder. Not in QSys' folder, or any place else.

Hello, Daixiwen!

I moved the .hex file to the folder where my Quartus hardware project exists.

Cimpilation time increased twice.

But the result was the same - nothing worked after congiguration

Ragards

I will share what I have done in my working project:

I am using Quartus II ver12.1 web edition with NIOS II Eclipse 12.1,

first, for NIOS II processor system, I have the the setup in Qsys tool as shown in img1.https://www.alteraforum.com/forum/attachment.php?attachmentid=8209

then I build my C source project in NIOS IDE, and created the required memory initialization file for the on-chip memory (connected to both instruction and data master of NIOS processor) in the following default location:

C:\altera\cryosystem\software\cryosystem1040\mem_init.hex

along with meminit.qip and meminit.spd

these files are generated by Eclipse and are not included in Quartus project at this point.

What I do next is go back to Quartus, and open the hex file in quartus, as shown in img2.https://www.alteraforum.com/forum/attachment.php?attachmentid=8206

I change that to 32, then you get correct memory boundaries as shown in img3.https://www.alteraforum.com/forum/attachment.php?attachmentid=8207

Then you can save and replace the original hex file, checked that the saved file is included in the project, as in img3.

Finally when the quartus project is compiled, you can look at the compilation report as shown in img4.https://www.alteraforum.com/forum/attachment.php?attachmentid=8208

My on-chip memory component will be initialized with the hex file when the generated sof is loaded.

I hope this answer some of your questions.

Hello, benc!

I'll try you suggested on Monday and will reply.

Thank you.

Regards,

tduty

Hello, benc!

Thank you for your screen shots.

I did everything as you wrote but my application did not work.

I examined the differences in your and my projects and noticed you did not use the jtag uart, but I did.

I don't know why the example author advised to use this component because later nothing was done with it.

I deleted it.

And after fulfilling all steps I got the working application.

To make sure that the jtag uart prevented from the success I repeated projects creation some times - replacing and deleting this component.

Though I've got some experience not every time my results coincided. Very rare the checksum of the .sof file were equal to the previous one. Sometimes after saving the .hex file I did not find it in the file window of the Settings pad and so I was to manually add it.

Of course I could do mistakes but I believe the Quartus is capricious.

My finding is - the jtag uart prevented from success.

Thank you for your help in particular for your screen shots.

I would like to thank Daixiwen too - I'll follow his advices.

Too many issues are still unsolved.

Regards,

tduty

Hello, Daixiwen!

Right you are.

In the example there is some output to the Nios II console and I've forgotten the jtag uart is used to do it.

I deleted everything concerning this output from the application.

And now inspite of the jtag uart presence my application starts just after FPGA configuration.

But I did not understand your words - "JTAG UART driver hangs the CPU if the Nios console isn't connected."

I beleive my Nios console is connected because if I implement "Run As" the data is displayed in the console.

Now I am to create my BSP project. Though I read too many tutorials the Nios II Software Developer's Handbook seems to be written not for beginners - it contains "steps to implement" something but does not describe how to do it.

Some items are discribed in other books (Embedded Design Handbook etc.) So a beginner is in the dark. But it is his issue.

Regards, tduty

Just one explanation more.

Of course I described two various situations - one with jtag uart present but not used in my application and another one when it is used and I fulfill "Run As".

Regards