bit shift and extract

I'm not sure about the syntax, but this is the usual way to extract bits in HDL:

signal a : std_logic_vector(31 downto 0);
--pull out some bits
output <= a(19 downto 12);

(...)
variable temp: integer range 0 to 65535;
variable d3: integer range 0 to 15;
(...)
-- and currently apply it the following way
d3 := to_integer(shift_right(unsigned(temp), 24)) and "11111111";

Thank you dear Moderator! Thank you Cris72!!! First, you're absolutely right, I'm absolutely rather fighting with VHDL than understanding what I'm doing. Thus I really appreciate your answers!! I appologize, but please be patient with guys like me :)

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
package my is
	-- function declaration: has one return value
	function int_to7seg(a:integer) return std_logic_vector;
	
	-- procedure declaration: has several return values
	procedure seg_ctrl(signal number: in integer; signal digit1, digit2, digit3, digit4: out integer range 0 to 9);
end my;
package body my is
	function int_to7seg(a:integer) return std_logic_vector is
	variable result: std_logic_vector(6 downto 0);
	begin
		case a is
		-- since segments are active when LOW(0), the function must return 1111001 for '1'
			when 0 => result := "1000000"; -- display 0
			when 1 => result := "1111001";
			when 2 => result := "0100100";
			when 3 => result := "0110000";
			when 4 => result := "0011001";
			when 5 => result := "0010010";
			when 6 => result := "0000010";
			when 7 => result := "1111000";
			when 8 => result := "0000000";
			when 9 => result := "0010000"; -- extend for values up to 15
			when others => result:=(others=>'0'); -- rest all to '0'
		end case;
		return result;
	end int_to7seg;
	-- split the number, if the number is bigger than e.g. 999,
	-- divide it by 1000, the result is the number of the 4th
	-- 7-seg-display
	procedure seg_ctrl(signal number: in integer; signal digit1, digit2, digit3, digit4: out integer range 0 to 9) is
	variable temp: integer range 0 to 9999; -- I changed this to a different limit
	variable d1: integer range 0 to 9;-- I changed this to a different limit
	variable d2: integer range 0 to 9;-- I changed this to a different limit
	variable d3: integer range 0 to 9;-- I changed this to a different limit
	variable d4: integer range 0 to 9;-- I changed this to a different limit
	begin
		temp:= number;
		-- thousands
		if(temp>999)then
-- TODO for this position (I renamed d3, starting from d0), I'd like to cut out the specific bits
			d4 := temp/1000;
			temp := temp-d4*1000;
		else
			d4 := 0;
		end if;
		-- houndreds
		if(temp>99)then
			d3 := temp/100;
			temp := temp-d3*100;
		else
			d3 := 0;
		end if;
		-- tens
		if(temp>9)then
			d2 := temp/10;
			temp := temp-d2*10;
		else
			d2 := 0;
		end if;
		-- ones
		d1 := temp;
		-- translate to digits
		digit1 <= d1;
		digit2 <= d2;
		digit3 <= d3;
		digit4 <= d4;
	end seg_ctrl;
end my;

This code looks exactly like someone who is trying to write VHDL as if it was a programming language, rather than a hardware description language.

Hi again,

IF all you want is to display a number directly out of avalon, then yes, all you need is a bit extract and it probably wont use a lot of logic (you'll need some to do the hex display decode).

case av_ip(31 downto 24) is
  when x"00" => seven_seg <= x"80";
  when x"01" => seven_seg <= x"F1";
  --etc

I will convert the package procedure into a process. Actually, for the more complicated things I'm trying to work with state machines. I understood that digital logic is absolutely essential. For other beginners projects, actually I tried to work this way. I'll keep on learning digital logic, but better try to apply it in practice, for sure! Thank you very much!