Arria 10 Native Floating Point Adder Issue

I'm using Quartus 19.1 Standard and there is an odd issue with the native Arria 10 floating point adder. As shown in the attached, the Ax input has a latency of 3 clocks but the Ay of only two. So the output is not Ax + Ay at the same clock cycle. If I add an external register stage to Ay, it works as expected. The extra register in Ax does not seem to server any purpose and seems like an odd design choice.

Am I missing something?

The native multiplier works as expected with a latency of 3 clock cycles.