haianhle
New Contributor
3 years agoAnalyze HDL file encrypt_1735
I encrypted the hdl file with encrypt_1735 (dti_phy_ctl_blk.v -> dti_phy_ctl_blk.vp)
"encrypt_1735 dti_phy_ctl_blk.v --language=verilog --quartus"
then I took that file to analyze and got an error:
Error: Internal Sub-system: QIS, File: /quartus/synth/qis/qis_rtl_stage_utility.cpp, Line: 705
Error: No modules found when analyzing [PATH]/dti_phy_ctl_blk.vp.
How can I synthesize encrypted files?
Thanks and best regards
phuongnn0