altera_connection_identification_hub error
Hi,
During compilation of a design in Quartus Prime 17.0, I get following error,
Warning (12019): Can't analyze file -- file db/ip/slde4bbd51f/altera_connection_identification_hub_170/synth/alt_sld_fab_altera_connection_identification_hub_170_iq3gmfi.sv is missing
However, I can see the file (.sv) in the path and I can read it.
As a result, I got following 12006 Node error
Error (12006): Node instance "ident" instantiates undefined entity "alt_sld_fab_altera_connection_identification_hub_170_iq3gmfi". Ensure that required library paths are specified correctly, define the specified entity, or change the instantiation. If this entity represents Intel FPGA or third-party IP, generate the synthesis files for the IP.
I used assignments to point to the library "db/ip/slde4bbd51f/altera_connection_identification_hub_170/synth" to allow picking up the .sv file. But it did not help. I also copied the .sv file to another folder and pointed it as a local library and that did not help as well.
Screenshots are attached.
regards,
Charles
Two things: 1) What debugging tool are you using that is adding in the sld hub? Signal Tap? 2) There are spaces in your project path. That could be the problem.