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Annu's avatar
Annu
Icon for New Contributor rankNew Contributor
5 months ago

AHDL Simulation

How do we simulate an AHDL file in Text format using VHDL testbench using Quartus ii tool

Simulation

3 Replies

  • KennyT_altera's avatar
    KennyT_altera
    Icon for Super Contributor rankSuper Contributor
    5 months ago

    sorry for the late reply, what you can do is convert the file to the HDL files.


    In Quartus prime std, click file -> create update -> create HDL file from current files.


    Please take note that AHDL is already deprecated from the support.


  • KennyT_altera's avatar
    KennyT_altera
    Icon for Super Contributor rankSuper Contributor
    4 months ago

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