Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

Strange clock cycle delay in Custom instruction

Hi all!!

I implemented a custom instruction with the "Multi-Cycle Custom Instruction" technique.

I used: clock, clk_en, reset, start, dataa[31..0], result[31..0].

My custom instruction perform in only 1 clock-cycle, but it isn't a combinatorial logic; I used registers.

I simulated it and it works!! I obtain the result in a single clock-cycle.

But when I imported it in SOPC Builder, it works only if I write that the operation takes 2 clock-cycle.... http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/sad.gif

Anyone encountered this problem?

Bye! http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/rolleyes.gif

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    21 years ago

    Hi,

    My thought :

    If you use a multicycle instruction is it at minimum 2 cycles. The first is for setting up the data at your data input ports (from the register file), the second is to wait until it sees the ready signal.

    I did approximatly the same, and have also a minimum of 2 cycles.

    STefaan
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    21 years ago

    http://www.altera.com/literature/an/an188.pdf (http://www.altera.com/literature/an/an188.pdf)

    Page 14. You enable your logic with the start bit. If you use a register you can see that on the 2nd rising clock edge your data is latched so on the rising edge of the 3rd clock is when the NIOS latches your result (don&#39;t forget it needs to latch your data, so that&#39;s your 2 clocks of latency).

    So it&#39;s not really a problem, you just need one more stage of latency. Even if that start came out earlier, since you have a register you&#39;ll never get it down to 1 cycle.

    Cheers.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    21 years ago

    Ya the latency is with respect to the NIOS itself and not your instruction. I usually just remember to add one to whatever my hardware needs.