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Altera_Forum
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21 years ago

Strange clock cycle delay in Custom instruction

Hi all!! I implemented a custom instruction with the "Multi-Cycle Custom Instruction" technique. I used: clock, clk_en, reset, start, dataa[31..0], result[31..0]. My custom instruction p...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

Ok, thanks!

It was only a conventional problem.

My c.i. has start bit high at T1 and done bit high at T2 => i called it "1-clock cycle" instruction

But it seems Nios speaks about "2 clock cycle" for a similar instruction.

Ok. thanks

Bye! http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/wink.gif