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Altera_Forum
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21 years agoSRAM vs SDRAM
Hi,
I am about to design a system with uClinux, and I was wondering if the performances would be correct if I only used an SDRAM. SRAM is a bit expensive if I want to have enough memory to run my linux (I guess I need at least 4MB). However, I have read in some threads around here that SDRAM performances were quite bad. Is there any experience here of people running linux without SRAM ? My second question is quite the same and about the Altera Cyclone devboard : I use the standard design (using SRAM as exception address thus), and I follow the Quick Start Guide to build a kernel, that I run from the SDRAM. In this case, I suppose the whole kernel is uploaded in SDRAM and then executed from there. My question is : is the SRAM still in use ? Do I lose any performance if I remove it ? I can see that ramfs file systems are mounted but I guess its only in SDRAM. I suppose the /dev/ramX are linked to the SDRAM, not the SRAM, so is the SRAM in use ? Thanks a lot cetic17 Replies
- Altera_Forum
Honored Contributor
Hi Michael,
> What is the difference in prize of this memory compared to sdram ? half ? twice ? Depending on density, roughly twice. E.g. for low quantity: MT48LC8M16 (8M x 16): ~ 10 USD MT45W8MW16 (8M x 16): ~ 16 USD MT45W4MW16 (4M x 16): ~ 11 USD Your mileage may vary ;-) Regards, --Scott - Altera_Forum
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Hi smcnutt,
do you use a 16 bit or 32 bit external databus to the psram ?? thanks for your replay nepomuk - Altera_Forum
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> do you use a 16 bit or 32 bit external databus to the psram ??
16-bit --Scott - Altera_Forum
Honored Contributor
--- Quote Start --- originally posted by smcnutt@Jan 20 2005, 01:29 PM hi cetic,> ... i have read in some threads around here that sdram performances
> were quite bad.
i've found the sdram controller performance to be pretty awful. given
the logic area it occupies and its performance, i no longer consider it a
viable alternative for many new designs.
> sram is a bit expensive if i want to have enough memory to run
> my linux (i guess i need at least 4mb).
i've switched to psram (pseudo sram) for new designs. it eliminates
the sdram controller and it performs better[/b]. The cost is very attractive ... the expense is the number of pins you must use. Regards, --Scott <div align='right'><{post_snapback}> (index.php?act=findpost&pid=4142) --- Quote End --- [/b] --- Quote End --- Scott, I've been consdering using PSRAM for our upcoming NIOS II system, mainly due to it's much lower power consumption vs DDR. Do you use the PSRAM as a simple SRAM replacement (in which mode it has quite slow 70ns access times) or do you make use of the Burst mode to get much faster average access rates? I've been tinking about knocking up an interface block to access it in burst mode but the effectiveness of that depends on whether the NIOS can cache grabs it's instruction stream in bursts or not. Mark.
- Altera_Forum
Honored Contributor
Hi Mark,
> Do you use the PSRAM as a simple SRAM replacement (in which mode it has > quite slow 70ns access times) or do you make use of the Burst mode to get much > faster average access rates? I use it as a simple SRAM replacement. As for the access times ... on the board I was referring to, I was (continue) to use a 50 MHz clock. So compared to SDRAM with anything more than 3.5 clocks per access, the PSRAM isn't slow ;-). And I observed SDRAM performance that was _much_ worse than that. Aside from the extra pins, the PSRAM was ideal for the application -- and I was able to move to a lower density FPGA. Also, to be fair, I haven't re-visited the matter -- so I don't know if the SDRAM controller has improved. >I've been tinking about knocking up an interface block to access it in burst mode Same here ... I'm thinking the same for our new board. But unfortunately, like many other things ... it's still just thinking. ;-) This might be a good candidate to add to a wish list for the Altera design teams. Regards, --Scott - Altera_Forum
Honored Contributor
What kind of power restrictions are you on? I persoally don't think DDR is too heavy on power... that is, without using Vtt termination. I doubt you could get to speeds high enough to require Vtt termination, unless you had multiple chips banked.
Maybe DDR2? - Altera_Forum
Honored Contributor
--- Quote Start --- originally posted by jdhar@Feb 20 2006, 12:11 PM what kind of power restrictions are you on? i persoally don't think ddr is too heavy on power... that is, without using vtt termination. i doubt you could get to speeds high enough to require vtt termination, unless you had multiple chips banked.maybe ddr2?
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=12825)
--- quote end ---
--- Quote End --- Thanks Scott, I agree, a PSRAM IP block from Altera would be very nice! jdhar: I have looked at DDR and DDR2, though I can only go on what the data sheets tell me as I've no personal experience. In our battery powered app a 256Mb DDR looks like taking anywhere between 300mW and 600mW, whereas the equivalent amount of PSRAM takes no more than 120mW. I don't really need the full DDR speed, I just want to be able to run one or several NIOS processors at around 80MHz without incurring too much slow down due to slow RAM. PSRAM in burst mode looks like it could be a perfect match, but I'm still in two minds.