soc_system_board_info.xml/hps_common_board_info.xml common accross most devboards ?

partially functional -- now stuck at loading kernel ....

just more digging involved ....

Hey Ralph,

I'm interested in hearing how you go with this board. I have the DE0-nano-SoC and the Arrow SoCkit (which is also a Terasic board). I'm interested in understanding how to build everything from source, i.e, downloading source code from a git repo while not having to hack the source for these particular boards. I also noticed that the DE-nano-SoC code was not easily available and the documents were pretty vague with respect to building the SoC system and Linux code. I figured I'd start with the SoCKit, and then go back to the DE0-nano-SoC once I was familiar with the tool flows.

I haven't had a chance to dive into the HPS side of things yet, I started on the FPGA-side, since I was comfortable there :)

Cheers,

Dave

Hey Dave,

Yes, started with the FPGA side a while back (was going to be De0-Nano (Cyclone4) with a external CPU (BeagleBoard))

but flipped over the the De0-Nano-SoC due to space/timing & ram issues

-- so 95% of my fpga work is done -- mostly have to worry about Fpga2sdram interface

really are living in minimal documentation land here ... (or there is too much & difficult to filter ...)

... with any luck - be booting soon... (tonight ??!?)

hiho

R

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really are living in minimal documentation land here ... (or there is too much & difficult to filter ...)

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Yes, I've found there to be a lot of documentation, but most of it is not well written.

For example, "How do you create pin assignments for the HPS pins?" would be an obvious question to someone familiar with FPGAs. Its not obvious that the HPS pin assignments are a result of pin settings in the component instance (and are configured by the preloader). I'm not sure whether I have ever seen it stated in an Altera doc, I think I made that realization while watching a tutorial.

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... with any luck - be booting soon... (tonight ??!?)

--- Quote End ---

Good luck!

Cheers,

Dave

update : booting . but not really

or i should say not completely on my own //

i can create all it parts kernel/zImage/rootfs / boot.scr, soc_system.rbf, preloader-mkpimage.bin

but it only boots if i use the socfpga.dtb from the sdcard that came with it (posted on the terasic site) .. .

i have followed suggestions / remove second WDT, drop/disable peripherals in the soc_system.sopcinfo

i have converted / modified/ loaded generated dts files

i have unconverted the working blob to text& re'blob'ed it .. & it still boots

/ all others hang at "loading kernel ...."

I've requested any board*info.xml from Terasic -- they do provide a version for the De1-SOC

so it should not be a stretch for them to pass it on ---

obviously

the original device tree does me no good

it does not support the peripherals i've created

feeling some what stymied

update Board --> soc_system_board_info.xml<-- for DE0-Nano-Soc can be found in the Workshop images

http://rocketboards.org/foswiki/view/documentation/socswworkshopseriessdcardimages

(haven't tried them yet)

from the files above IT WORKS ---- though note :

------------

sopc2dts has order effects - the first(given in the workshop material) does NOT work

------------

sopc2dts --input soc_system.sopcinfo

--output soc_system.dts

--type dts

--board board_info_DE0_NANO_SOC.xml

--board hps_common_board_info.xml

--bridge-removal all

--clocks

---------

swapping hps_common_board_info.xml & board_info_DE0_NANO_SOC.xml does work :

---------

sopc2dts --input soc_system.sopcinfo

--output soc_system.dts

--type dts

--board hps_common_board_info.xml

--board board_info_DE0_NANO_SOC.xml

--bridge-removal all

--clocks

----

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from the files above IT WORKS

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How much of it works? i.e., do you get to a Linux prompt now with just a console interface, or do you have the console, ethernet, etc working?

I haven't had a chance to play with the board this week.

Cheers,

Dave

yes- console, ethernet, mini webserver & fpga is loaded at boot via boot loader (MEL="00000")

leds are functional (built my code into the HPS_CONTROL_FPGA_LED demo project )

rebuilt kernel with kernel debug on (so i know its mine)

the angstrom distribution socfpga_cyclone5 ttys0

angstrom v2013.12 - kernel 3.10.31-ltsi-05035-g801a40f

-----

BTW: another interesting hoop to jump through to get good header files

sopcinfo2swinfo soc_system.sopcinfo

swinfo2header --swinfo soc_system.swinfo

creates amongst others --> hps_0.h <-- which has nice formatted info for the fpga devces ...

Nice work!

Cheers,

Dave