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Altera_Forum's avatar
Altera_Forum
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20 years ago

SIOCSIFADDR error

This is a custom board. I have taken everything out except for the Flash and SDRAM. It is actually a fairly simple system, flash, sdram, and an ethernet port. I don't use tightly_coupled_memory (have not familiarized myself with it yet), and my data cache line size is 4 Bytes, exception pointer is set to SDRAM.

I am out of ideas. I also can not load the kernel into RAM from the IDE, I'm forced to burn the Flash each time I make a change. I get the following message from the IDE console. Do I have a JTAG problem? I'm using a USB Blaster "Rev B".

Downloading 08000000 ( 0%)

Downloading 08010000 ( 6%)

Downloading 08020000 (12%)

Downloading 08030000 (18%)

Downloading 08040000 (25%)assertion "m_state == STATE_DEBUG" failed: file "nios2

debug.cpp", line 1695

Signal 6

Here is a copy of what I get when I launch the nios2-terminal. Most of the time I'm unable to log into the system, I usually get "Login incorrect." When I am able to log in, I usually get kicked out fairly shortly, and the system goes back to the login prompt.

uClinux/Nios II

Altera Nios II support © 2004 Microtronix Datacom Ltd.

Built 1 zonelists

Kernel command line: root=/dev/mtdblock0 ro

PID hash table entries: 1024 (order: 10, 16384 bytes)

Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)

Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)

Memory available: 128640k/131072k RAM, 0k/0k ROM (857k kernel code, 203k data)

Mount-cache hash table entries: 512 (order: 0, 4096 bytes)

Linux NoNET1.0 for Linux 2.6

Serial: JTAG UART driver $Revision: 1.4 $

ttyJ0 at MMIO 0x80000860 (irq = 2) is a jtag_uart

io scheduler noop registered

io scheduler anticipatory registered

io scheduler deadline registered

io scheduler cfq registered

RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize

Altera NDK flash (AMD): Found 1 x8 devices at 0x0 in 8-bit bank

Amd/Fujitsu Extended Query Table at 0x0040

Altera NDK flash (AMD): CFI does not contain boot bank location. Assuming top.

number of CFI chips: 1

cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.

cmdlinepart partition parsing not available

RedBoot partition parsing not available

Using Altera NDK partition definition

Creating 2 MTD partitions on "Altera NDK flash (AMD)":

0x00200000-0x00600000 : "romfs/jffs2"

0x00000000-0x00200000 : "loader/kernel"

VFS: Mounted root (romfs filesystem) readonly.

Freeing unused kernel memory: 52k freed (0x80f2000 - 0x80fe000)

expand: from=/ramfs.img to=/dev/ram0

expand: from=/ramfs.img to=/dev/ram1

SIOCSIFADDR=-1: 9

SIOCGIFFLAGS = -1: Bad file descriptor (9)

SIOCADDRT=-1: 9

Unable to create socket

close on exec: : Bad file descriptor

setsockopt: : Function not implemented

Unable to bind server socket: : Function not implemented

Unable to listen to socket

Unable to create socket

close on exec: : Bad file descriptor

setsockopt: : Function not implemented

Unable to bind server socket: : Function not implemented

Unable to listen to socket

Unable to create socket

close on exec: : Bad file descriptor

setsockopt: : Function not implemented

Unable to bind server socket: : Function not implemented

Unable to listen to socket

/etc/issue www.microtronix.com June 2005

Welcome to Linux on the Nios II

Nios2 login:

Any ideas would be great,

Doug

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    Doug,

    Did you ever figure out your problem?

    I am also developing a custom board. I also get the mysterious error:

    assertion "m_state == STATE_DEBUG" failed file "nios2debug.cpp", line 1695 signal 6

    What does this message mean? I just opened an SR with Altera, but have been stuck with this for a couple of weeks now....

    My conditions are as follows:

    I get this error just by reversing the order of how I open my tools. If I open a shell to load my hardware before opening IDE I get the error.

    If I open IDE before opening my SDK shell I DO NOT get error. The result is reproducible with some of my boards. Other boards will hang with the message:

    nios2-terminal: (Use the IDE stop button or Ctrl-C to terminate)

    or not respond to further commands.

    I am in a jam because my boards have been manufactured and assembled and are ready for production , and now this error shows up.

    -Baycool

    I am using Quartus 5.0 and Nios II 5.0 with a Full License for both
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    Baycool,

    Nope, I never did figure it out. I do know that I can connect to my board through the ethernet port with out any problems. Everything works fine here, I can telnet in, ping it, and the web server runs just fine. I'm pretty sure this is a JTAG UART issue. I just don't know what yet.

    I'm working on trying to figure this out. We got another custom board back late Friday. I will get that one up and running to see if the same problems arise.

    I tried your trick of opening the IDE first. It still bombed on me.

    I'll let you know if I find anything out.

    Doug
  • Altera_Forum's avatar
    Altera_Forum
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    20 years ago

    Thanks Doug for your reply.

    It is very consoling to see that I am not the only person suffering with these problems.

    Last week I was so elated even to find a hit on my search for "m_state == STATE_DEBUG".

    I get so many communications problems with the JTAG UART that this is an almost impossible problem to debug.

    I tried a "grep" on the message in the entire /kits directory and could turn up NOTHING.

    At the very least I would like to see this message in C source and atleast know for sure the cause of the problem.

    By the way, do you even have an occasional comm problem with your ethernet port?

    -Baycool
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    Baycool,

    At this point, I can't isolate the problem, therefore, I can't say it is a JTAG UART problem, but I'm pretty sure that is the source of my headaches.

    Up to now, I have not had any problems with my ethernet port.

    Doug