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Altera_Forum
Honored Contributor
Honored ContributorSIOCSIFADDR error
This is a custom board. I have taken everything out except for the Flash and SDRAM. It is actually a fairly simple system, flash, sdram, and an ethernet port. I don't use tightly_coupled_memor...
Altera_ForumHonored Contributor
Honored ContributorDoug,
Did you ever figure out your problem? I am also developing a custom board. I also get the mysterious error: assertion "m_state == STATE_DEBUG" failed file "nios2debug.cpp", line 1695 signal 6 What does this message mean? I just opened an SR with Altera, but have been stuck with this for a couple of weeks now.... My conditions are as follows: I get this error just by reversing the order of how I open my tools. If I open a shell to load my hardware before opening IDE I get the error. If I open IDE before opening my SDK shell I DO NOT get error. The result is reproducible with some of my boards. Other boards will hang with the message: nios2-terminal: (Use the IDE stop button or Ctrl-C to terminate) or not respond to further commands. I am in a jam because my boards have been manufactured and assembled and are ready for production , and now this error shows up. -Baycool I am using Quartus 5.0 and Nios II 5.0 with a Full License for both
