Forum Discussion
Occasional ContributorNios-V alt_epcq_controller_write() Problem
Hi Balerion,
Regading to avl_mem slave:
If you also place avl_mem slave in Peripheral Region, you can use the current altera_epcq_controller.c file as is.
However, you may want to place avl_mem slave in cacheable (non-Peripheral) region to take advantage of the cache for read accesses. In that case, cache maintenance needed for flash memory write operation in Nios V/g system. Here is a code example (= not fully validated) to achieve this attached (please replace the file extension from ".txt" to ".c"). At the end of the alt_epcq_controller_write_block() function, cache flush function call and error checking are added.
Thanks,
ShoH
Occasional ContributorHi Balerion,
Thanks for checking. OK, I need to say: You must locate registers of peripheral IPs in a peripheral region.
https://www.intel.com/content/www/us/en/docs/programmable/726952/25-1/peripheral-region.html
If the jtag uart appears to work within your current system, please consider it a coincidence.
At a minimum, in your system, you must define a Peripheral Region to place the jtag uart and the epcq avl_csr registers in peripheral region, such like:
Peripheral Region Size : 64 KBytes or larger
Peripheral Region Base Address : 0x48050000
Thanks,
Sho
Occasional ContributorHi ShoH,
So, what I understand up to now is that there are two options for me. The first one is that I will disable caching in my nios-v/g configuration(0Kilobytes of cache) and the other option is that according to "https://www.intel.com/content/www/us/en/docs/programmable/726952/25-1/memory-configurations-tab.html" I have to place my peripherals to non-cached address space to do that I need to create peripheral region.
There comes a few questions to my mind:
- What differs between Peripheral A and Peripheral B and which one should I choose?
- Let's say I create peripheral region, Do I need to also create tightly coupled memory region as well or peripheral region is enough?
- Why do peripherals have to be located to the non-cached address space?
Thanks,
Balerion
