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Altera_Forum's avatar
Altera_Forum
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21 years ago

Problem with a memory on NIOS2 idle

Hi,

I would have more information about the Nios II IDLE software cause i have several problems just to execute a test soft on my prototyping board.

My board contains a 10Mo CY7C1061AV33 memory Sram, a Sdram and a flash.

My main problem is that i can t choose my SRAM on NIOS II IDLE software as program and data memory on the system library windows.

Could you gice me some ideas ?

Merci d avance http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/unsure.gif

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    21 years ago

    Hello XAV,

    Have you setup an SOPC Builder IP module class for your SRAM , and configured it into your generated Nios System? Once that is done, the SRAM module will be included in your Quartus SOF file, and the definitions will be generated for the PTF file which is read by the Nios II IDE. I can point you to some examples of SRAM IP modules examples included in the Nios II Development kit if you like.

    Best regards,

    Stephen O&#39;Reilly

    Altera Embedded Applications Engineering
  • Altera_Forum's avatar
    Altera_Forum
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    21 years ago

    Thank you so much,

    I wrote a class.ptf for my sram and I add it on SOPC Builder. My Sram accept read and write access when nios runs. But IDE (when i check memory data ) disable my sram when i want put data in the Sram...

    So if you can help me to create a clean IP, I agree...
  • Altera_Forum's avatar
    Altera_Forum
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    21 years ago

    --- Quote Start ---

    originally posted by xav...@Jun 23 2004, 05:53 AM

    thank you so much,

    i wrote a class.ptf for my sram and i add it on sopc builder. my sram accept read and write access when nios runs. but ide (when i check memory data ) disable my sram when i want put data in the sram...

    so if you can help me to create a clean ip, i agree...

    --- Quote End ---

    Xav,

    If you used Interface to User Logic to add your memory, be sure to set the bus type to "Avalon Memory Slave".

    This has the effect of setting the address alignment to "dynamic". In your class.ptf file, you should see something like this:

    Address_Alignment = "dynamic";

    The IDE won&#39;t "see" your memory until you do this.

    Regards,

    slacker
  • Altera_Forum's avatar
    Altera_Forum
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    21 years ago

    Xav,

    Did you get your problem resolved?

    Anything else we can help with?
  • Altera_Forum's avatar
    Altera_Forum
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    21 years ago

    Excuse me to be late, but I forgot to come back in the forum to watch your new message.

    But it doesn t run... I don&#39;t know why!

    Thank you for your help.

    Cordialement
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    21 years ago

    Hello Xav,

    I don&#39;t know if this is still an issue for you.... but I&#39;ve a few questions that will, hopefully, steer you towards an answer.

    What doesn&#39;t work? It&#39;s still not visible in the IDE or you can&#39;t access your SRAM? Or, something else?

    As "slacker" mentioned, in an earlier post, the IDE requires that the peripheral type be "memory slave", which has the effect of setting address alignment to "dynamic" in your class.ptf file.

    If this still doesn&#39;t "address" this issue, for you (pardon the pun), please post/e-mail/(PM me) with further information.

    Best Regards,

    - Brendan

    P.S.: Have a look in <nios2_install_dir>/components/altera_nios_dev_kit_stratix_edition_sram*/class.ptf files... That might point you towards a resolution, as well.