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Altera_Forum
Honored Contributor
22 years agoProblem with a memory on NIOS2 idle
Hi, I would have more information about the Nios II IDLE software cause i have several problems just to execute a test soft on my prototyping board. My board contains a 10Mo CY7C1061AV33 memory ...
Altera_Forum
Honored Contributor
22 years ago --- Quote Start --- originally posted by xav...@Jun 23 2004, 05:53 AM thank you so much,
i wrote a class.ptf for my sram and i add it on sopc builder. my sram accept read and write access when nios runs. but ide (when i check memory data ) disable my sram when i want put data in the sram...
so if you can help me to create a clean ip, i agree... --- Quote End --- Xav, If you used Interface to User Logic to add your memory, be sure to set the bus type to "Avalon Memory Slave". This has the effect of setting the address alignment to "dynamic". In your class.ptf file, you should see something like this: Address_Alignment = "dynamic"; The IDE won't "see" your memory until you do this. Regards, slacker