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andy25's avatar
andy25
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Nios V, FIFO 8 bit width, altera_avalon_fifo_read_level

I have a project built in 22.1 Standard, that has a fifo with an 8 bit width:

I can read from my Nios V using the altera_avalon_fifo_read_level function, 1 byte at a time. Each time I call it the level drops by 1. It works as expected.

After I rebuild the project in 23.1 Standard, the altera_avalon_fifo_read_level function now reads 4 items at a time and returns a 32 bit int. The level drops by 4 each call.

There is a warning saying Nios II only supports 32-bit, and that you'll need to "access the registers directly". I don't know what that means.

I tried:

int sample = IORD_8DIRECT(IPMB_FIFO_OUT_BASE, ALTERA_AVALON_FIFO_DATA_REG);

While it returns 1 byte it also drops the level by 4.

How do I make 23.1 work like 22.1?

-Andy

8 Replies

  • Hi,

    Greetings and welcome to Intel's forum.

    Please give me some time to check on this issue and will get back to you with the update.

    Thank you.

    Regards,

    Fathulnaim


  • Hi,


    Is the design inspired by any online references?

    Could you share a screenshot of any warnings or errors that have popped up?




    • andy25's avatar
      andy25
      Icon for Occasional Contributor rankOccasional Contributor

      Online reference? No, not really.

      Warning/errors: Sure. For version 22.1 or 23.1? I'll assume 23.1. For platform designer, quartus or gcc?

      I can also create an IPS ticket and share the entire project if that would be helpful.

      I'm using the Intel Max10 Dev Kit

      23.1 Platform Designer Generate:

      Quartus has 130 warnings, most are about alter_gio_lite.sv and DDR3 timing. (I have tried a number of different things to resolve the DDR timing and nothing works. But I get the errors on both 22 and 23 so I don't think that's the problem).

      Let me know how else I can help.

      Thanks for your time,

      -Andy

      • andy25's avatar
        andy25
        Icon for Occasional Contributor rankOccasional Contributor

        ... which is weird, because in this version of the project I've removed my use of gpio_lite. Not sure if something else is using it though. But I'm not intentionally using it anymore.

  • Hi,


    Can I know where is this warning appeared "There is a warning saying Nios II only supports 32-bit, and that you'll need to "access the registers directly" ?



    • andy25's avatar
      andy25
      Icon for Occasional Contributor rankOccasional Contributor

      Platform Designer. The first picture I posted. 4 messages down.

  • Hi,


    You can create an IPS ticket and share the design project. We will continue our support in the IPS case, with that


    I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.