Multiple NIOS V Implementation
Hi,
I was looking at the NIOS V Processor Reference Manual. I could not find the max instantiations you can implement on a FPGA. I see many designs online of Nios II Multiprocessors. Can I make the assumption that it is the same as the Nios II and you can implement multiple instantiations of NIOS V on the same FPGA, as long as the hardware logic space (alm), memory, etc can support the design.
Lastly, is there any examples online for this?
I see examples like
and
and
https://www.youtube.com/watch?v=O54sJjSjq60
Thanks!
Hi,
Unfortunately, the official support for Nios V to use Mutex HAL API is not yet supported.
You may implement them at your own accord and we may not be able to support further if you encounter issue.
With this, do you have any further questions?
Again, we apologies giving you this bad news.