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JoshuaWillson's avatar
JoshuaWillson
Icon for New Contributor rankNew Contributor
2 years ago
Solved

Multiple NIOS V Implementation

Hi,

I was looking at the NIOS V Processor Reference Manual. I could not find the max instantiations you can implement on a FPGA. I see many designs online of Nios II Multiprocessors. Can I make the assumption that it is the same as the Nios II and you can implement multiple instantiations of NIOS V on the same FPGA, as long as the hardware logic space (alm), memory, etc can support the design.

Lastly, is there any examples online for this?

I see examples like

https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/horizontal/exm-multi-nios2-hardware.html

and

https://www.intel.com/content/www/us/en/design-example/714531/cyclone-v-creating-multiprocessor-nios-ii-systems-design-example.html

and

https://www.youtube.com/watch?v=O54sJjSjq60

Thanks!

Embedded Applications Layer
  • EBERLAZARE_I_Intel's avatar
    EBERLAZARE_I_Intel
    2 years ago

    Hi,

    Unfortunately, the official support for Nios V to use Mutex HAL API is not yet supported.

    You may implement them at your own accord and we may not be able to support further if you encounter issue.

    With this, do you have any further questions?

    Again, we apologies giving you this bad news.

12 Replies

  • EBERLAZARE_I_Intel's avatar
    EBERLAZARE_I_Intel
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hi,

    Unfortunately, the official support for Nios V to use Mutex HAL API is not yet supported.

    You may implement them at your own accord and we may not be able to support further if you encounter issue.

    With this, do you have any further questions?

    Again, we apologies giving you this bad news.

    • LiangYuG_Altera's avatar
      LiangYuG_Altera
      Icon for Occasional Contributor rankOccasional Contributor
      10 days ago

      Hi all,

      The Mutex HAL API is updated to support Nios V processor since Quartus Prime Pro 24.3, and Quartus Prime Standard 24.1.

      Regards,
      Liang Yu

  • EBERLAZARE_I_Intel's avatar
    EBERLAZARE_I_Intel
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hi,


    We regret to inform you the bad news on the yet supported feature.


    If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.



    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.


  • RCayssials's avatar
    RCayssials
    Icon for New Contributor rankNew Contributor
    2 years ago

    Hi,
    GeMRTOS (https://gemrtos.com) supports multiple Nios V/m processors. GeMRTOS is a multiprocessor RTOS that also supports Nios 2/e/f.
    The GeMRTOS Platform Designer IP component may be downloaded from https://github.com/G-RTOS/GeMRTOS.
    niosv-download issue avoids downloading the .elf file (most of the times) when more than 2 processors are instanciated. This issue was not fixed in Quartus Prime Standard Edition version 22.1 (https://www.intel.com/content/www/us/en/support/programmable/articles/000089679.html).
    Regards.

  • PShar32's avatar
    PShar32
    Icon for Occasional Contributor rankOccasional Contributor
    13 days ago

    I am try in to run multiple nios V, one is working perfectly fine other is not . I am using quartus 25. (Is this issue is resolved )

    • ashutoshsriram's avatar
      ashutoshsriram
      Icon for New Contributor rankNew Contributor
      11 days ago

      I am facing the same issue , according to documents I have read (link below),ashling supports only 1 hardware thread therefore only 1 core can run at a time .please let me know if you find a way to implement this

      https://www.scribd.com/document/979342170/How-to-Use-Ashalling-Riscfree

  • PShar32's avatar
    PShar32
    Icon for Occasional Contributor rankOccasional Contributor
    7 days ago

    I am thinking of :

    1. Compile the niosV codes in ashling.
    2. Generate .hex files for all the nios V processors.
    3. in platform designer , initialize the on-chip memory of NiosV with the hex file.
    4. Compile the Qsys.
    5. Compile the Quartus project.
    6. Dump the .sof file.

    Will this work,.. ?

    • LiangYuG_Altera's avatar
      LiangYuG_Altera
      Icon for Occasional Contributor rankOccasional Contributor
      6 days ago

      Hi PShar32​

      Can you open a new post on your issues?

      It would benefit the community, as one post is tied to one solution.
      If your issue is found to be not related to the Solution of this post, there will be two discussions & two solutions. 
      It would confuse future readers.

      And also provide a snapshot of the working QSYS subsystem vs the failing QSYS subsystem. And briefly explained the steps to get a Nios V working or falling.
      (Unfortunately, we are still unable to understand the full picture of your situation based on your previous post.)

      PShar32 wrote:

      I am try in to run multiple nios V, one is working perfectly fine other is not . I am using quartus 25. (Is this issue is resolved )

      Regards,
      Liang Yu