New Contributor
Frequent ContributorHello,
The General Settings section is located at the top level of the BSP settings when the BSP Editor is opened. A snapshot is attached for reference. The stdin, stdout, and stderr are currently set to none, but they should be assigned to the JTAG UART instance in your system. Setting these IO streams to "none" would isolate your FW/SW from the console.
From the linker settings, it appears that the system is using on‑chip memory rather than DDR3. In addition, the DDR3 region does not appear in the linker view. If a DDR controller is included in your Qsys design, this may indicate that it is not connected to the Avalon‑MM bus.
Given the current on‑chip RAM configuration, it is recommended to create a simple Hello World application and run it to verify basic system functionality and help isolate any unexpected design issues.
Thank you,
Fawaz
New ContributorHi Fawaz,
These points were set just after it was originally suggested but did not help. So it is not likely the issue is with the log console.
You are right about the linker so the DDR3 areas are not listed. Perhaps because they are not connected to NIOS data bus directly but via address extenders. Now they are added to the list by hand (nios_ddr3 and trace_ddr3):
SW code downloads well to 0x40000000 which is nios_ddr3 memory region so the DDR3 address range and the RAM itself should work well.
We tested this bsp as well but the situation still did not change.
Do you have any other suggestion what to check?
BR,
Istvan
