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aiedb's avatar
aiedb
Icon for Occasional Contributor rankOccasional Contributor
4 months ago

USING SIGNAL TAP TO MONOTOR AVALON_BUS WITH NIOS DESIGN

hii 

i need to use signal tap to see what's happening on avalon bus , i have a qsys system that is working fine , its the remote update example , and when i add  a signal tap file and add for example the avalon bus signals the connects to the on chip flash ip , and i try to write the cfm0 the signal tap does not work . i put the trigger on a rising edge of a avalon_write and nothing seems to happen , i be glad for help :)

Nios Architecture

4 Replies

  • aiedb's avatar
    aiedb
    Icon for Occasional Contributor rankOccasional Contributor
    4 months ago

    hii thanks for your reply and help , i did something that i expected it will work but i didn't.

    i added signal tap to the design and compiled the design converted it into pof file type , and programmed it to cfm0 and didn't work , but when i programmed my max10 with a sof file i managed  to monitor the signals of the avalon bus on the on chip flash ip , but all of the above are helpfull tips , hope it will help me in future designs. 

    • BoonBengT_Altera's avatar
      BoonBengT_Altera
      Icon for Moderator rankModerator
      4 months ago

      Hi aiedb ,

       

      I hope you’re doing well. I wanted to follow up and check if there are any remaining questions or concerns regarding this matter. 

      Please let us know if anything still needs clarification — we’re happy to assist further.

      Thank you for your time, and we look forward to your feedback.

       

      Best Wishes

      BB

      • BoonBengT_Altera's avatar
        BoonBengT_Altera
        Icon for Moderator rankModerator
        4 months ago

        Hi aiedb,

         

        Greetings, as we do not receive any further clarification/updates on the matter, hence would assume challenge are overcome. We will continue to monitor this post for the next 5 days. If there are no further inquiries during this period, I will step back and allow the community to assist with any future follow-up questions.

        Thank you for engaging with us!

         

        Best regards,
        Altera Technical Support

  • JitLoonL_Altera's avatar
    JitLoonL_Altera
    Icon for Occasional Contributor rankOccasional Contributor
    4 months ago

    Hi aiedb​ ,

     

    This usually comes down to a few common issues when using SignalTap on Avalon-MM in a Nios II / Platform Designer system:

    1. Wrong signal location (very common)

    Make sure you’re tapping the signals at the correct hierarchy. Avalon signals go through the interconnect, so if you tap near the IP but not the actual connected interface, you may see nothing.

    2. Signal optimization

    Quartus might optimize away unused signals. Try setting the signals or module to preserve/keep, or enable SignalTap node preservation during compilation.

    3. Clock mismatch

    Double check that SignalTap is clocked by the same clock domain as the Avalon interface to the on-chip flash. If the clock is wrong, triggers won’t fire.

    4. Trigger condition too strict

    A rising edge on write may not trigger as expected (due to pipelining or waitrequest).

    Try:

    Trigger on write == 1

    Or (write && chipselect)

    Or even immediate trigger just to confirm activity

     

    5. Transaction may not be happening

    Confirm your software is actually performing the write to CFM0. You can temporarily add a simple debug (e.g. GPIO toggle) to correlate.

     

    6. Capture depth

    Increase SignalTap buffer depth—short Avalon transactions can be easy to miss.

    7. Recompile properly

    Make sure you did a full recompile after adding SignalTap and programmed the correct .sof.