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Honored ContributorNewbie question: driving leds
Hello everybody!
I'm an absolute newbie in Altera / NIOS. I have an NEEK with Cyclon III and touch panel LCD. But for the time being, I am studying the basics. I have been through the document "my first NIOS II software" tutorial. Downloaded and installed recently the NIOS 9.1 and Quartus 9.1, both with their latest service packs. I downloaded the proper application (that goes together with the tutorial). Basically the application works. I have added the proper code to blink the LED and it works. Now as there are 4 leds, I modified like this : (The only modification is count & 0x0F instead of count & 0x01). while(1) { IOWR_ALTERA_AVALON_PIO_DATA(LED_PIO_BASE, count & 0x0F); delay = 0; while(delay < 2000000) { delay++; } count++; } I thought (naively) that if I give the 4 last bits to this macro, it would make a binary counter with the LEDS 1 to 4. However, it does nothing more than it used to, it seems that only the last bit is taken into account. If I simply use "count", without anding it with 0x01, it works the same. Am I missing something? Is there a configuration somewhere that enables or disables LEDS 2, 3 and 4? Thanks for any hint! Pascal14 Replies
Altera_ForumHi Pascal. Have you corrected the pinning? In the Example Designs there are fault Pin-Assignements for the LEDs. Try to correct them and try again. The Pins you can find in the reference_manual for the NEEK.
Edit: I have looked that up you can find a running example under NIOS_Evaluation_Kit_v8.0\cycloneIII_3c25_niosII\examples\cycloneIII_3c25_start_my_first_fpga the Pins are: PIN_P13 PIN_P12 <- this is wrong in "standard" it's PIN_T1 there PIN_N12 PIN_N9 Good Luck.- Altera_Forum
Hello Peet_2!
Thanks for your reply. This brings more questions: 1. How can I correct the pinning? (which file should I edit, how and with which edifor?) 2. I have found a reference to the relevant pins in the reference manual page 2-14. Indeed, it says that it is pin P12. How do you know it should be pin T1? I don't see schematics… Are there errata sheets somewhere? 3. Even if one of the pins is wrong, if I assign the leds using count & 0x0F, shouldn't I observe at least 3 working leds (those connected to P13, N12, N9?) Thanks, Pascal - Altera_Forum
Hi, I use Quartus for my designs, so I edit the Assignments and Pins from there. There is a tab Assignments in the Software, from which you can open the PinPlanner. It shouldn't be T1. In the documentation they say you have to use Pin12, but in the example projects, they have set PinT1, which seems wrong to me and schould be corrected.
How do you use the Project? Haven't you got the NEEK Evaluation_Kit CD? There are all Documents and ExampleDesigns on it. You can find that on Alteras FTP. I opened the "Standard" Example from the Example Folder of the CD and just looked into PinPlanner to see if the LEDs are connected correct. There is also a little Hardware-Example on the CD, which lets the LEDs count in Hardware. The name is hardware_tutorials/my_first_hardware_tutorial.pdf perhaps try that on your neek first. (When you power up the neek there is also one of the LEDs blinking. Are you sure you have got your custom code running correctly? Normally you have to built a NIOS-Design, connect the relevant Pins, do synthesis and load the Design into the FPGA. Before that you can't run your custom c-code on the NIOS. It's a silly question, but you are sure that runs ok?) Edit: the link is ftp://ftp.altera.com/outgoing/download/support/ip/processors/nios2/cycloneiii_3c25_niosii-v8.0.0.exe - Altera_Forum
Hello again!
Ok, I found the design files. Sorry. Yes, that's also what I did, I opened the cycloneIII_3c25_NiosII_standard file. Beside this I'm sure the program works. The original program just says "hello world", and the pdf tutorial sows the code to be added to blink one led. I added the code, recompiled and could verify that the led blinks. Now, replacing count & 0x01 by count & 0x0F and recompiling has no effect. What I did is exactly what is explained in the tutorial for NIOS. So there is no FPGA design. The FPGA design file (which is ready to use for this tutorial) is loaded and then the program is compiled and run. Now I checked the pin planner. Indeed, the led[1] is on T1. So I changed it to P12. Now something I don't understand: Why are there 2 nodes on the same pin ? I mean top_led and top_out_port_from_the_led_pio. Thans, Pascal PS: Now it's late here, I will continue tomorrow. - Altera_Forum
The design uses a verilog file for the system design, in this they first defined the Input/Output Pins. (for LED here it is: output [ 1: 0] top_led; )This Pins are connected to wires. These are also named (for the LED wire here wire [ 1: 0] top_led; ) and this wire connects the OutputPin of the NIOS Core. The outputport from the NIOS is then connected to the busses or components in the NIOS, but that isn't in the verilog toplevelfile anymore. (here .out_port_from_the_led_pio (top_led), where out_port_from_the_led_pio is the portname of the NIOS Side and connects to top_led)
Your code should work (with 0x0F) I have tried it and it works as you expected it. I have attached the compressed project to this thread. The C-Code is in the zip as txt-File. Perhaps you look more into creating a NIOS System. I have generated a NIOS-Core very simple for this demo, to test. It has just a CPU, Memory and the PIO. The design I have created as a blockshematic. In my opinion for first start this is a bit better to read, also it work like the verilog file or vhdl. (the names of the project are messed up, because I stripped an old project for this, so just ignore the filenames) (some more tipps for start: read the manuals, they are quite good. Never add spaces to pathes when working with altera tools. when you update your nios core sometimes you have to regenerate your bsp to get the nios code working again. make backups of working code before further editing. Some path are absolute in the designs, so don't move project folders. while in the SOPC Builder, you can deactivate modules by clicking the green arrows on the left. Sometimes this saves a lot of time, because the parameters does not have to put in later again, you can just reactivate.) Good Luck with the NEEK. ;-) - Altera_Forum
Hello!
Thanks for your help! That's what I call technical support! I will probably have some more questions.. Pascal - Altera_Forum
Hello!
Here we go for another question. I am writing a tutorial for a design from scratch, which is a good way to learn myself. What I did: - Create an empty project; - Configured the right parameters (for the device of the NEEK = EP3C25324C8). - Opened the SOPC builder, left the default verilog checked, added a NIOS processor (just in case, I started with the smallest model). - Added some internal memory and set the memory2_0.s1 at a proper value to eliminate errors. The generation went fine, without errors or warnings. (No PIO yet, I just want to check if the processor can run). - As the top object (forgive the improper terms if any) was the default "MyFirstFPGA" and the SOPC design was called niostest, I checked niostest_inst.v, and wrote MyFirstFPGA.v accordingly. - Now, I am stuck at the last step. I wanted to use Pin Planner to add a clock and a reset. I could first add the clock, but I cannot change the direction to input. So that will be the only accurate question for today: how do I change the direction of a pin in Pin Planner? I tried right-click -> Pin Properties, right-click->node properties, no way to produce any effect. Beside this, if there is something wrong in what I did, please tell me! Thanks for your help! Pascal - Altera_Forum
I cannot follow your description, the last paragraph with the defining of the top level is a bit confusing.
I think what you mean is how to define the clock as input signal. That you must do in your verilog file, where you define the pins. The direction then appears in the pinplanner after synthesis I think. (Can't follow your steps, as I am not sitting before Quartus right now.) - Altera_Forum
Hello Peet!
Here is an accurate version of what I did. http://passworld.co.jp/forummsp430/viewtopic.php?f=18&t=166&p=392#p392 Now you were telling me I should define the clock as an input in the vhdl file, but which one? Thanks! Pascal - Altera_Forum
That Forum requires registration. Attache the file here please, then I might look into it.
