Forum Discussion
New version of NiosII Flash Programmer
Hello,
I'm reading the manual for the Nios II Flash Programmer User Guide, but it appears to not cover my software? On page 18, figure 1-3 shows options for "Program flash memory with software project" - I do not have this at all on my display? http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/huh.gif I'm fully patched up 4.1 sp2? help! I'm trying to understand how to place my program into the EPCS after the bitsream!! http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/blink.gif Thanks for any and all guidance offered! joe26 Replies
- Altera_Forum
Honored Contributor
> Unrecognized EPCS device ID: -1
-1 ... 0xff ? ... it might be time to pull out the scope to check your chip select, clock & data signals ... sounds like the data line could be stuck. Or you might want to try accessing the epcs device directly via asmi using xxxBlaster if you have a header available -- just to confirm your copper. If you're using u-boot, you can enable epcs support, download it via jtag & use the epcs commands to test. Regards, --Scott - Altera_Forum
Honored Contributor
Yes, I can program the EPC4 via the byteblaster header.
I will have to find out what u-boot is. - Altera_Forum
Honored Contributor
Maybe it is something with combining AS and JTAG configuration scheme....?
From within quartus should I not be able to autodetect the FPGA and the Serial configuration device on the Jtag bus? I can only see the FPGA? My only way of seeing/programming the Seial Configuration device is thru the byteblaster header. - Altera_Forum
Honored Contributor
> From within quartus should I not be able to autodetect the FPGA
> and the Serial configuration device on the Jtag bus? > > I can only see the FPGA? You should only see the FPGA. The epcs is behind the FPGA from a JTAG point-of-view ... that's why the flash programmer design is necessary. > My only way of seeing/programming the Seial Configuration device is > thru the byteblaster header. If you don't have a flash programmer design, you are correct -- you would have to use the ASMI w/xxxBlaster. If you do have a (working) flash programmer design you can do everything through JTAG and avoid placing yet another header on your board. Joe, are you sure that your FPGA is properly loading its configuration from the epcs? You might want to program the epcs via ASMI and debug from there. Regards, --Scott - Altera_Forum
Honored Contributor
I actually get the same (Unrecognized EPCS device ID: -1) using the devkit nios board? I did that mk_target_board thing again,etc - but this time bound it to the devkit ref design..... is it likely my tools are screwed up here?
also, the message : Input file empty--no data to program into flash. Exiting. seems odd? or is that simply talking about the external AMD flash having nothing to program with (which is fine) Anyways,my console gives me this.... make: Entering directory `/cygdrive/f/projects/devkit/full_featured/software/devkit_standalone_test/Release' nios2-flash-programmer --input=ext_flash.flash --sof=`F:/altera/quartus41/sopc_builder/bin/find_sopc_component_dir dev_kit_board_test`/system/dev_kit_board_test.sof --device=1 --base=0x00800000 31-Jan-2005 13:50:00 - (INFO) nios2-flash-programmer: Input file empty--no data to program into flash. Exiting. 31-Jan-2005 13:50:09 - (INFO) nios2-flash-programmer: Launching Quartus Programmer to download: F:/projects/devkit/full_featured/dev_kit_board_test/system/dev_kit_board_test.sof Unrecognized EPCS device ID: -1 31-Jan-2005 13:50:28 - (SEVERE) nios2-flash-programmer: Error opening target hardware 31-Jan-2005 13:50:28 - (SEVERE) nios2-flash-programmer: Unable to open flash-device after successfully communicating with target. It is likely that you are using a flash-programming FPGA design which was not created for your target board. - Altera_Forum
Honored Contributor
I have tried a simple test, using the pre-built target board flash programmer. Apart from a Java application erro at the very end, it sucessfully programs the EPC device on my Nios Cyclone Devkit via the JTag connector.
So..... the .sof pre-built programmer from Altera for the dev-kit works okay. However, if I try to build my own target_board (for the nios devkit) using this line:- ml_target_board --name=dev_kit_board_test --family=cyclone --clock=50 --index=1 --buffer_size=16384 --epcs=U59 and try to then use this flash programmer design the failure is as follows, so this 'Unrecognized EPCS device ID: -1' must be a problem with my tools? Is it possible to get the source-design for the Altera Flash Programmer, since it clearly works - and presumaly it was generated using the mk_target_board utility? If this is the case, what exact command-line parameters were used? http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/ohmy.gif make: Entering directory `/cygdrive/f/projects/devkit/full_featured/software/devkit_standalone_test/Release' nios2-flash-programmer --input=ext_flash.flash --sof=`F:/altera/quartus41/sopc_builder/bin/find_sopc_component_dir dev_kit_board_test`/system/dev_kit_board_test.sof --device=1 --base=0x00800000 31-Jan-2005 15:36:08 - (INFO) nios2-flash-programmer: Input file empty--no data to program into flash. Exiting. 31-Jan-2005 15:36:16 - (INFO) nios2-flash-programmer: Launching Quartus Programmer to download: F:/projects/devkit/full_featured/dev_kit_board_test/system/dev_kit_board_test.sof Unrecognized EPCS device ID: -1 31-Jan-2005 15:36:36 - (SEVERE) nios2-flash-programmer: Error opening target hardware 31-Jan-2005 15:36:36 - (SEVERE) nios2-flash-programmer: Unable to open flash-device after successfully communicating with target. It is likely that you are using a flash-programming FPGA design which was not created for your target board. In order to program flash, you must first create a purpose-built flash-programming design (i.e. FPGA configuration) and associate it with your particular board. The Nios development kit is delivered with purpose-built flash-programming designs pre-built for several development boards. If you wish to program flash on your own board, you must first create a flash-programming design. The process of creating a flash-programming design for your board is mostly automated. From a bash-shell, execute this script: mk_target_board --help The help-message includes references to other documentation on programming flash and targeting Nios systems to custom board designs. - exiting. make: *** [epcs_controller_boot_rom_programflash] Error 5 make: Leaving directory `/cygdrive/f/projects/devkit/full_featured/software/devkit_standalone_test/Release' - Altera_Forum
Honored Contributor
There must be some problem with the mk_target_board script?
I can't even build a target for the devkit correctly? Quite frustrating this. Is there *Any* chance altera will provide a simple utility program to produce a *single* programming file that I could use to send to the EPCS via the byteblaster header? please! If such a progam existed, then I could avoid all this derived-programmer-design lark. ??? http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/huh.gif - Altera_Forum
Honored Contributor
what on earth is the magic ingredient here folks?
any ideas? http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/ohmy.gif - Altera_Forum
Honored Contributor
> any ideas?
If you do the following from the nios-II shell ...: $ nios2-flash-programmer --epcs --erase --sof=<flash_programmer_sof> ... what do you observe? - Altera_Forum
Honored Contributor
[SOPC Builder]$ ls *.sof
dev_kit_board_test.sof* /cygdrive/f/projects/devkit/full_featured/dev_kit_board_test/system [SOPC Builder]$ nios2-flash-programmer --epcs --erase --sof=dev_kit_board_test. sof 01-Feb-2005 14:27:01 - (INFO) nios2-flash-programmer: Launching Quartus Programm er to download: dev_kit_board_test.sof Unrecognized EPCS device ID: -1 01-Feb-2005 14:27:17 - (SEVERE) nios2-flash-programmer: Error opening target har dware 01-Feb-2005 14:27:17 - (SEVERE) nios2-flash-programmer: Unable to open flash- device after successfully communicating with target. It is likely that you are using a flash-programming FPGA design which was not created for your target board. In order to program flash, you must first create a purpose-built flash-programming design (i.e. FPGA configuration) and associate it with your particular board. The Nios development kit is delivered with purpose-bui lt flash-programming designs pre-built for several development boards. If you wi sh to program flash on your own board, you must first create a flash-programming design. The process of creating a flash-programming design for your board is mostly automated. From a bash-shell, execute this script: mk_target_board --help The help-message includes references to other documentation on programming flash and targeting Nios systems to custom board designs. - exiting. /cygdrive/f/projects/devkit/full_featured/dev_kit_board_test/system [SOPC Builder]$