New component in SOPC builder

Could you please post you ip code, as it is not clear to me how you have implemented your counter as an sopc component

have you used chipselect, adr data and control signals ?

This is the code for first design

library ieee;

use ieee.std_logic_1164.all;

use ieee.std_logic_arith.all;

use ieee.std_logic_unsigned.all;

entity count_led_0 is

port(clk : in std_logic;

rst : in std_logic;

count : out std_logic_vector(3 downto 0);

en : in std_logic;

);

end entity count_led_0;

architecture rtl of count_led_0 is

signal counter : std_logic_vector(3 downto 0);

begin

process(clk,rst,en)

begin

if(rst='1') then

counter <= "0000";

elsif (clk'event and clk='1')then

if (en='1') then

counter <= counter + '1';

else

counter <= counter - 1;

end if;

end if;

end process;

count <= counter;

end architecture rtl; -- of count_led_0

And following is code for second design

library ieee;

use ieee.std_logic_1164.all;

use ieee.std_logic_arith.all;

use ieee.std_logic_unsigned.all;

entity count_led_0 is

port(clk : in std_logic;

rst : in std_logic;

count : out std_logic_vector(3 downto 0);

en : in std_logic;

en_1 : in std_logic

);

end entity count_led_0;

architecture rtl of count_led_0 is

signal counter : std_logic_vector(3 downto 0);

begin

process(clk,rst,en)

begin

if(rst='1') then

counter <= "0000";

elsif (clk'event and clk='1')then

if (en='1') then

counter <= counter + '1';

else

counter <= counter - 1;

end if;

end if;

end process;

count <= counter;

end architecture rtl; -- of count_led_0

your component has no Avalon MM-Slave interface

no address, chipselect ...

so your component can't be assigned a base adress as it uses no address.

maybe you should start with this documentation to understand how to setup your own ip as an sopc builder component

avalon interface specification (http://www.altera.com/literature/manual/mnl_avalon_spec.pdf)

Thanks for help.

Actually i am new to SOPC, so have no idea how to go around with this.

Can you suggest steps to follow in order to add new component?

It will be really helpful if you could take this example while describing steps.

Thanks and regards

Saransh

you need some kind of interface between sopc and your component, depending an what you want to do

i assume you want to use some kind of cpu like nios to read and or write to your counter, but you haven't added such an interface.

currently you ip has nothing in common with an sopc component except clock and reset.

so there is nothing an external function like a cpu can do with your ip.

maybe you could add a register that holds your enable and this signal can be modified by your cpu via avalon

Ok

But for this interface, I was planning to give 'en' (enable) signal from NIOS II.

This 'en' signal (as evident in code also), will be serving the purpose to select between Up o Down counter.

Thus, 'en' will be serving the purpose of interface.

Are we required to give any other signal also?

Will 'en' be not serving the purpose of interface? Or am I getting totally lost here understanding interfacing?

Kindly suggest the correct solution.

Thanks and regards

Saransh

where does your enable come from ?

where is it generated and where is it controled by whom ?

if you want your nios to enable / disable your counter then you can add a PIO and assign one of these PIO signals as EN to your ip, but for that you do not need to include your ip function as an sopc component. why not add your ip on top level ? you generate your nios with all funtionality including a PIO and connect that onw particular signal from your PIO as EN to your counter ?