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Amir3's avatar
Amir3
Icon for Occasional Contributor rankOccasional Contributor
3 years ago
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Eclipse - Serial Flash Controller II IP-Core - Micron MT25QL256 - The initial process goes wrong

Hey,

At Nios environment, I am using the "Serial Flash Controller II Intel FPGA IP" in order to communicate with the Micron MT25QL256 memory device. This device is connected to the Active-Serial signals on the FPGA (Cyclone 5).

In Eclipse, the IP-Core driver addresses the ID register in Byte #1 instead of Byte #3. This mismatch prevents the driver from finishing its initialization process.

From Micron MT25QL256 Datasheet:

1. Could it be that the Eclipse (or the Quartus), with this IP-Core, does not know how to analyze the data from the MT25QL256 and, in fact, it analyzes the data of the memory device as if it were an EPCQ256?

2. Is there any setting similar to "pgm_allow_mt25q=on" on Quartus.ini file that can be put into Eclipse?

Thanks.

7 Replies

  • hareesh's avatar
    hareesh
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi

    The "Serial Flash Controller II" IP does not support external flash such as Micron but dropdown selection got micron, there are some register memory map mismatch issue if using micron. please use Generic QUAD SPI Controller II.


    Actually engineering team plating for new ip for this. may be it's available in next version.


    reference :

    https://community.intel.com/t5/FPGA-Intellectual-Property/Failed-driver-initialization-of-Serial-Flash-Controller-II-Intel/m-p/1430968#M26632



    • Amir3's avatar
      Amir3
      Icon for Occasional Contributor rankOccasional Contributor
      3 years ago

      Hi Harish,

      Thank you for searching for the solution!

      BTW, why not use the IP-Core "Generic Flash Serial Interface"?

  • hareesh's avatar
    hareesh
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi,

    Generic QUAD SPI Controller II only can support for micron. May be Generic Serial Flash Interface IP drivers also not matching to micron registers. so, we suggesting QUAD SPI Controller II.



    if you don't have any queries about this i'll close the case. please conform


    Thanks,


    • Amir3's avatar
      Amir3
      Icon for Occasional Contributor rankOccasional Contributor
      3 years ago

      Hey Hareesh,

      I have a new problem using this IP-Core (QUAD SPI Controller II) - I can't burn the SW image (Nios Application) to the Micron MT25QL256 by the 'quartus_pgm' function.

      background:

      - Original project - Contain Nios2f with the regular Cores (RAM, Timer and more..) and 'Serial Flash Controller' IP-Core.

      - New project - Contain Nios2f with the regular Cores (RAM, Timer and more..) and 'Generic QUAD SPI controller II' IP-Core.

      - Note - The QSYS component is clocked at a rate of 14[MHz].

      - Flash Batch file - "E:\intelFPGA_standard\22.1\nios2eds\bin\elf2flash.exe --verbose --input=HelloWorld.elf --output=HelloWorld.flash --base=0xX --end=0xZ --reset=0xV --boot=E:\intelFPGA_standard\22.1\nios2eds\components\altera_nios2\boot_loader_cfi.srec
      pause".

      - Burn Batch file - "E:\intelFPGA_standard\22.1\quartus\bin64\quartus_pgm --nios2 --epcq --csr=0xY --debug --base=0xX --cable="USB-Blaster on localhost" HelloWorld.flash
      pause"

      My experiments so far:

      - Original project - Quartus Standard 18.0 - The Burn Batch file works fine and the SW image is burned to the memory device.

      - Original project - Quartus Standard 22.1 - The Burn Batch file works fine and the SW image is burned to the memory device.

      - New project - Quartus Standard 22.1 - The Burn Batch file doesn't work and the SW image does burn to the memory device, and I get this message:

      When I operate the Nios2f from the Eclipse by 'Run' or 'Debug', with all 3 projects ,It works - I get "Hello World" message.

      • Amir3's avatar
        Amir3
        Icon for Occasional Contributor rankOccasional Contributor
        3 years ago

        Hey Hareesh,

        I would appreciate your help.

        Thanks.

  • hareesh's avatar
    hareesh
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi,

    In Eclipse, the IP-Core driver addresses the ID register in Byte #1 instead of Byte #3. This mismatch prevents the driver from finishing its initialization process


    can you please give more information about that line. i didn't get it.


  • hareesh's avatar
    hareesh
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.