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Altera_Forum's avatar
Altera_Forum
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13 years ago

Cyclone III Configuration Advice Required...

Hi All,

I am just about to start the design & layout for my first CYCLONE III based board using the EP3C10E144C8N device. I have read a good deal on the EPCS app notes but would like some feedback on my design.

My plan is the following:

To use an Atmel AT25DQ161-SSH-B serial flash device connected to the EPCS pins of the FPGA (ASDO, nCSO, DCLK & DATA0).

On top of this, CONF_DONE, nSTATUS and nCONFIG pins will be pulled up to 3v3 with 10K resistors.

nCE will be connected to GND and nCEO will be unconnected.

The MSEL pins will be connected so as to allow AS config mode.

Then to program the device, I have a USB-BLASTER that I plan to use to automatically configure the FPGA into SFL mode and drop the JIC files into the serial flash device as per AN370.

Does this sound feasible to all you folks with experience in these matters, and will I be able to also convert my NIOS 'C' applications for programming into the serial flash so that after configuring the FPGA the NIOS core will then load the code from the same device and copy it to DDR RAM.

Any advice would be most gratefully taken.

D

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Your design sounds good.

    Regarding the JTAG interface; my personal preference is to buffer it using TinyLogic buffers from Fairchild (TI have similar parts). They can handly 7V overshoot and so are very tolerant of JTAG cable over-shoot due to poorly terminated transmission lines. At a minimum add 100-ohm series resistor on each of the signals.

    Cheers,

    Dave
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Thanks Dave,

    Nice advice on the use of buffers, I wouldn't have thought of that!

    D
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Hi Dave,

    Another thought occured to me. I would like to be able to use the serial flash device to store lookup tables that are used and updated in the program. I assume that this would be possible in one serial flash (if suffieciently large) such that I can:

    1) Configure FPGA

    2) Load NIOS code into SDRAM

    3) Store lookup tables for use by main program.

    I would imgaine that as long as I make sure that I dont overwrite the config and C prgram it should be OK?

    What do you think?

    D
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    --- Quote Start ---

    Another thought occured to me. I would like to be able to use the serial flash device to store lookup tables that are used and updated in the program. I assume that this would be possible in one serial flash (if suffieciently large) such that I can:

    1) Configure FPGA

    2) Load NIOS code into SDRAM

    3) Store lookup tables for use by main program.

    I would imgaine that as long as I make sure that I dont overwrite the config and C prgram it should be OK?

    --- Quote End ---

    Yes, this will work fine. I'm planning on putting a Spansion S25FL512S device on a board I am working on. Its not an officially supported AS device, however, the serial flash command codes are identical. The device can be configured to operate in Quad-SPI mode, so once the Cyclone IV E has configured, I will be able to access the flash much faster for reads (writes involve 'programming' delays, so the Quad nature is not as much of a benefit there).

    Cheers,

    Dave