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Altera_Forum
Honored Contributor
20 years agoCompact Flash HW & SW Examples
Hi all,
I found this site: http://www.niosforum.com/pages/project_det...p_id=67&t_id=17 (http://www.niosforum.com/pages/project_details.php?p_id=67&t_id=17) and downloaded the the design file on that site to test. But when I compile the standard.qpf in folder std_cf_2c35 using Quartus 6.0, it geneated an error: error: node instance "ddr_control" instantiates undefined entity "auk_ddr_controller" So, I have two questions: 1) Which 2C35 KIT? 2c35 dsp kit or 2c35 nios kit ??? Because 2C35 DSP kit doesn't have CF Card connector and 2C35 Nios Kit doesn't have DDRAM. 2) How to correct this error? Thanks in advance, Viet.20 Replies
- Altera_Forum
Honored Contributor
The example 2C35 is nios2 dev board, not dsp board.
- Altera_Forum
Honored Contributor
--- Quote Start --- originally posted by hippo@Jun 12 2006, 12:33 PM the example 2c35 is nios2 dev board, not dsp board.<div align='right'><{post_snapback}> (index.php?act=findpost&pid=16103)
--- quote end ---
--- Quote End --- Thanks for your answer. But, how about the error: error: node instance "ddr_control" instantiates undefined entity "auk_ddr_controller" Because as far as I know, the 2C35 Nios II development board doesn't used DDR. Thanks, Viet.
- Altera_Forum
Honored Contributor
--- Quote Start --- originally posted by viethoang@Jun 12 2006, 01:44 AM but, how about the error:Error: Node instance "ddr_control" instantiates undefined entity "auk_ddr_controller"[/b] Because as far as I know, the 2C35 Nios II development board doesn't used DDR. Thanks, Viet.[/b] --- Quote End --- The CycloneII Developement Board does use DDR sdram. See the manual http://www.altera.com/literature/manual/mn...loneii_2c35.pdf (http://www.altera.com/literature/manual/mnl_nios2_board_cycloneii_2c35.pdf) I found out that you have to inclued some vhdl files of the ddr sdram megacore component. You can find them under <Your megacore directory>/ddr_ddr2_sdram-v3.3.0/lib. Just add the .vhdl files to your QuartusII project. Wolfgang
- Altera_Forum
Honored Contributor
Thanks every body for helping me!
I have another question, please help me. Does any one have examples (or know any documents) about read/write on CF card using file IO functions instead of using read/write byte. Thanks, Viet. - Altera_Forum
Honored Contributor
--- Quote Start --- originally posted by viethoang@Jun 12 2006, 05:12 PM thanks every body for helping me!i have another question, please help me.
does any one have examples (or know any documents) about read/write on cf card using file io functions instead of using read/write byte.
thanks,
viet.
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=16112)
--- quote end ---
--- Quote End --- You need OS support. There uCOS/2, eCos, and uClinux. I prefer uClinux. http://nioswiki.jot.com/wikihome/operating...ms/%c2%b5clinux (http://nioswiki.jot.com/wikihome/operatingsystems/%c2%b5clinux)
- Altera_Forum
Honored Contributor
The CycloneII Developement Board does use DDR sdram. See the manual http://www.altera.com/literature/manual/mn...loneii_2c35.pdf (http://www.altera.com/literature/manual/mnl_nios2_board_cycloneii_2c35.pdf)
I found out that you have to inclued some vhdl files of the ddr sdram megacore component. You can find them under <Your megacore directory>/ddr_ddr2_sdram-v3.3.0/lib. Just add the .vhdl files to your QuartusII project. Wolfgang <div align='right'><{post_snapback}> (index.php?act=findpost&pid=16111)</div> --- Quote End --- Thank you very much! That problem was solved as your instruction. But there are two errors that I don't know: 1) Error: Tcl error: can't find package ::ddr::settings 2) Error: Evaluation of Tcl script auto_verify_ddr_timing.tcl unsuccessful How can I solve these errors? Viet. - Altera_Forum
Honored Contributor
1. install ddr core 3.4.0
2. remove old ddr 3.3.0 lib path and ddr files in quartus II project files. 3. enter sopc build , there will be warning for unassigned pin of ddr, and set them to "assgined in quartus II". 4. regenerate sopc builder 5. compile in quartus again. - Altera_Forum
Honored Contributor
--- Quote Start --- originally posted by hippo@Jun 12 2006, 08:04 PM 1. install ddr core 3.4.02. remove old ddr 3.3.0 lib path and ddr files in quartus ii project files.
3. enter sopc build , there will be warning for unassigned pin of ddr, and set them to "assgined in quartus ii".
4. regenerate sopc builder
5. compile in quartus again.
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=16123)
--- quote end ---
--- Quote End --- I did as your instructions, but when I ran SOPC Builder to regenerate, it issued an error: error: in f:/altera/mywork/cf/cf_examples_for_niosforum/std_cf_2c35/std_2c35.ptf, can't read clock_source setting for ddr_sdram instance of ddr_sdram_component v3.2.0. How can I fix this bug? Thanks, Viet.
- Altera_Forum
Honored Contributor
Hi hippo,
Thank you very much for your help. I am just a beginner. I have fixed that problem. But I have another question. As your instruction: <div class='quotetop'>QUOTE </div> --- Quote Start --- You need OS support. There uCOS/2, eCos, and uClinux. I prefer uClinux. http://nioswiki.jot.com/wikihome/operating...ms/%c2%b5clinux (http://nioswiki.jot.com/wikihome/operating...ms/%c2%b5clinux)[/b] --- Quote End --- I downloaded zImage for 2C35 board: zimage_std_2c35. And then I downloaded this image to 2C35 board (ofcourse, after download .sof for it). This process finished successfully. But when I ran nios2-terminal there's no response from the board, the Nios II Command Shell only displayed: [sopc builder]$ nios2-terminal --cable usb-blasternios2-terminal: connected to hardware target using jtag uart on cable
nios2-terminal: "usb-blaster [usb-0]", device 1, instance 0
nios2-terminal: (use the ide stop button or ctrl-c to terminate) and did not return. What is this error? How can I solve it? Thanks.
- Altera_Forum
Honored Contributor
Hi,
Anyone could help me? I have the same problem when I try on EP2S60ES with zimage_std_2s60. I don't know why. Thanks a lot. Viet.