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Altera_Forum
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19 years ago

Compact Flash HW & SW Examples

Hi all, I found this site: http://www.niosforum.com/pages/project_det...p_id=67&t_id=17 (http://www.niosforum.com/pages/project_details.php?p_id=67&t_id=17) and downloaded the the design fi...
Altera_Forum's avatar
Altera_Forum
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19 years ago

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originally posted by hippo@Jun 12 2006, 08:04 PM

1. install ddr core 3.4.0

2. remove old ddr 3.3.0 lib path and ddr files in quartus ii project files.

3. enter sopc build , there will be warning for unassigned pin of ddr, and set them to "assgined in quartus ii".

4. regenerate sopc builder

5. compile in quartus again.

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I did as your instructions, but when I ran SOPC Builder to regenerate, it issued an error:

error: in f:/altera/mywork/cf/cf_examples_for_niosforum/std_cf_2c35/std_2c35.ptf, can&#39;t read clock_source setting for ddr_sdram instance of ddr_sdram_component v3.2.0.

How can I fix this bug?

Thanks,

Viet.