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Altera_Forum
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11 years ago

boot from S25FL512S

Hi all,

I try to boot from QSPI Flash (S25FL512S) but I am having some difficulties.

I have the same DDR3 as altera cyclone v soc board + two QSPI S25FL512S connected to the hps side. Input clock for FPGA and HPS = 25MHz.

First, I followed the tutorial on rocketboard:

http://rocketboards.org/foswiki/view/documentation/gsrd131qspiboot

but the flash was not detected, then, I added these lines in u-boot spl file spansion.c 


   {
        .idcode1 = 0x0220,
        .idcode2 = 0x4d00,
        .pages_per_sector = 256,
        .nr_sectors = 1024,
        .name = "S25FL512S",
    },

but i still have a problem, the board reboot non stop with this log rather than going to u-boot 


U-Boot SPL 2013.01.01 (Jun 29 2015 - 17:26:52)
BOARD : Altera SOCFPGA Cyclone V Board
CLOCK: EOSC1 clock 25000 KHz
CLOCK: EOSC2 clock 25000 KHz
CLOCK: F2S_SDR_REF clock 0 KHz
CLOCK: F2S_PER_REF clock 0 KHz
CLOCK: MPU clock 400 MHz
CLOCK: DDR clock 400 MHz
CLOCK: UART clock 100000 KHz
CLOCK: MMC clock 488 KHz
CLOCK: QSPI clock 200000 KHz
RESET: WARM
INFO : Watchdog enabled
SDRAM: Initializing MMR registers
SDRAM: Calibrating PHY
SEQ.C: Preparing to start memory calibration
SEQ.C: CALIBRATION PASSED
SDRAM: 512 MiB
SF: Read data capture delay calibrated to 1 (0 - 2)
SF: Detected S25FL512S

I have no idea, I have tried many things. I can boot with the arrow sockit but the flash is different.

there is something missing :/

I attached my quartus design.

thank you for your help

11 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hi,

    I'm pretty sure this is because the U-Boot port on which this preloader is based upon does not fully support this flash.

    As seen in the datasheet (http://www.spansion.com/support/datasheets/s25fl512s_00.pdf), the bit EXTADD of the Bank Address Register is set to 0 by default, and this means that

    the FAST_READ (0Bh) command used by U-Boot expects to be followed by a 3-byte address, but since the device is > 16 MB,

    U-Boot automatically uses a 4-byte address! So the preloader copies garbage to the DDR, and then tries to run it, the watchdog is

    triggered, and so on...

    There is also a similar problem related to the Normal or Quad operation.

    The changes are not too difficult to implement, but actually Altera pushed last week a commit that adds this support!

    So, you can take a look at this commit, and see if it solves your problem:

    https://github.com/altera-opensource/u-boot-socfpga/commit/5a47f31c98e6c70185f3423bc82f3414cb25ca2c

    Hope this helps!
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hi slesne,

    thank you for the information

    I saw this patch only spansion.c change, now I also use this version for the preloader and u-boot + i added some modifications

    in uboot-socfpga/drivers/mtd/spi/spansion.c

    1. Replace

    flash->sector_size = 256 * params->pages_per_sector;

    With:

    flash->sector_size = 512 * params->pages_per_sector;

    2. I added

    {

    .idcode1 = 0x0220,

    .idcode2 = 0x4d00,

    .pages_per_sector = 512,

    .nr_sectors = 256,

    .name = "S25FL512S",

    },

    Also change the following in uboot-socfpga/include/configs/socfpga_common.h:

    From this:

    # define CONFIG_CQSPI_PAGE_SIZE (256)

    To this:

    # define CONFIG_CQSPI_PAGE_SIZE (512)

    but i still have the same problem so run the preloader code step by step with the debugger

    i stop at this line (line 191 in spl.c)

    image_entry((u32 *)boot_params_ptr);

    I think my changes to support this flash are not good to jump to the next image
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hi,

    This might not be the only problem, but this print of the image name is a bit sketchy, I've had some trouble with it in the past.

    (I think that the spl_image.name doesn't end with a null char, so it reads too far in the memory, this might be what triggers the ECC error)

    I would advise commenting it out! (uboot-socfpga/common/spl/spl.c, around line 116)

    Hope this helps!
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hi slesne,

    you have right 

    
U-Boot SPL 2013.01.01 (Jul 02 2015 - 16:30:48)
BOARD : Altera SOCFPGA Cyclone V Board
CLOCK: EOSC1 clock 25000 KHz
CLOCK: EOSC2 clock 25000 KHz
CLOCK: F2S_SDR_REF clock 0 KHz
CLOCK: F2S_PER_REF clock 0 KHz
CLOCK: MPU clock 800 MHz
CLOCK: DDR clock 330 MHz
CLOCK: UART clock 100000 KHz
CLOCK: MMC clock 488 KHz
CLOCK: QSPI clock 400000 KHz
RESET: COLD
SDRAM: Initializing MMR registers
SDRAM: Calibrating PHY
SEQ.C: Preparing to start memory calibration
SEQ.C: CALIBRATION PASSED
SDRAM: 512 MiB
SF: Read data capture delay calibrated to 3 (0 - 7)
SF: Detected S25FL512S with page size 262144, total: 67108864
U-Boot 2013.01.01-00114-g9381569-dirty (Jul 02 2015 - 16:30:54)
CPU   : Altera SOCFPGA Platform
BOARD : Altera SOCFPGA Cyclone V Board
I2C:   ready
DRAM:  256 MiB
MMC:   ALTERA DWMMC: 0
SF: Read data capture delay calibrated to 3 (0 - 7)
SF: Detected S25FL512S with page size 262144, total: 67108864
*** Warning - bad CRC, using default environment
In:    serial
Out:   serial
Err:   serial
Skipped ethaddr assignment due to invalid EMAC address in EEPROM
Net:   mii0
Warning: failed to set MAC address
Hit any key to stop autoboot:  0
** Bad device mmc 0 **
Optional boot script not found. Continuing to boot normally
** Bad device mmc 0 **
** Bad device mmc 0 **
Bad Linux ARM zImage magic!
SOCFPGA_CYCLONE5#

    Now I will a linux image

    Thanks a lot for your help
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Hi,

    Your conversations are very help ful for me.After enabling 4byte addressing repeat log message problem solved.

    I stored my baremetal application on qspi flash by using following commands

    mkimage -A arm -O u-boot -T standalone -C none -a 0x02100000 -e 0 -n "baremetal image" -d hwlib.bin hwlib.img

    quartus_hps -c 1 -o PV -a 0x60000 hwlib.img.bin

    After debugging through printf statements it is stopping at following line

    image_entry((u32 *)boot_params_ptr);

    After this statement it's not jumping to baremetal application which i have stored at 0x6000 location.

    Any suggestions is appreciated.

    Hayder what modifications u have done to jump to u-boot while it was struck at image_entry((u32 *)boot_params_ptr);

    waiting for ur replies
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    --- Quote Start ---

    mkimage -A arm -O u-boot -T standalone -C none -a 0x02100000 -e 0 -n "baremetal image" -d hwlib.bin hwlib.img

    quartus_hps -c 1 -o PV -a 0x60000 hwlib.img.bin

    --- Quote End ---

    Hi,

    I think you need to use 0x02100040 as the load address (-a switch), to account for the 64-byte header of the image.

    You can take a look at the "Unhosted" example from this page: https://www.altera.com/support/support-resources/design-examples/soc.html

    Hope this helps!
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Hi slesne,

    Thanks for the reply.I tried with 0x02100040 as the load address,still i am facing same problem.

    The link u have given will be useful in future.

    currently I am working cyclone v soc custom board.In board only 3 options are provided(boot from qspi,NAND and FPGA).when ever i try to debug project through DS-5 in boot from qspi flash mode ,it's always throwing following error

    Target Message: Could not determine target state

    currently i can't debug example projects on board.

    Any suggestions are welcome to proceed

    Thank you
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    10 years ago

    Hi,

    Hayder what modifications u have done to jump to u-boot while it was struck at image_entry((u32 *)boot_params_ptr);

    I am waiting for ur suggestion Mr.slesne.

    Thanks