Forum Discussion
Application code residing in the EPCS
Has anyone used the EPCS controller to hold 100% of your application code? We are pin limited and I was considering giving it a whirl. Any idea of how long the boot loader in the FPGA takes to copy the applicaiton in the EPCS to SDRAM (~512K app)? Are we talking milli seconds or seconds? Does anyone have any pointers or things to consider/watch for? Any info would be great!
Rick13 Replies
- Altera_Forum
Honored Contributor
I have experimented with this quite a bit Rick, but obviously for development & test rather than an actual real product. The most I've done is to put a demo of about 300K into EPCS flash. To my eyes, the startup time wasn't any worse than having the code in parallel flash and having the boot-loader copy it over.... I am sure that it did in fact take more time but it certainly wasn't perceptable to me; if you really need to know the time I'd suggest playing with a system where Nios reset to a small on-chip memory that fired off a timer, and then jumped to the EPCS peripheral (to start its boot-loader). Your application could then stop the timer at whatever convenient point you want (alt_main entry, main entry, etc).
- Altera_Forum
Honored Contributor
I second Jesse's statement. There is no perceptible delay from hitting reset to the code running. The only problem you might run into is the size of your app. I'm using a Cyclone C6 and my code is under 200k and it uses 3 sectors of the EPCS. You might need a larger device than the EPCS4. I'm told that there are other serial flashes that are pin and protocol compatible with the EPCS series. But, I don't think the Altera tools support anything but the EPCS1 and EPCS4. Good luck.
- Altera_Forum
Honored Contributor
I have the same task, but i already build custom board with EPCS16 and IDE tel's me that device ID is not supported but connection was succesful.
So is it possible to make some how hot fix? Is someone knows it's problem in nios2-programmer or in nios2 system witch dowload SW code to EPCS? tnx. - Altera_Forum
Honored Contributor
You created target information for your custom board correct? If not then you need to do that first (need to give a reference designator and flash/epcs mappings). The flash programming guide gives instructions on how to do that.
- Altera_Forum
Honored Contributor
Yes, i have done custom board project and my board is present in SOPC?
BUT in that project for EPCS device used ASMI controller with EPCS1 & EPCS4 support only instead EPCS controller core And when i try to implement my design from IDE's Flash Programmer into EPCS16 device In console i saw that Connection to targen is OK and ID of target device (ID is correct for EPCS16 ) is unknown But you want to tel me that EPCS16 is supported ? Is it realy true ? Do you check that ? If yes what i do wrong ? - Altera_Forum
Honored Contributor
If this is the error message that you see in the window at the bottom of the screen while flash programming, can you copy and paste everything (even the parts of the flash programming that appear to be working) into this post.
- Altera_Forum
Honored Contributor
Questions for Jesse..
[if you really need to know the time I'd suggest playing with a system where Nios reset to a small on-chip memory that fired off a timer, and then jumped to the EPCS peripheral (to start its boot-loader).] How do you jump to the EPCS peripheral? If you configure the SOPC to have the reset location pointing to the EPCS, does the boot-loader (256 byte one) automatically load the code for you? How do you tell it where to load the code (which RAM if you have more than one)? Rick - Altera_Forum
Honored Contributor
Rick,
When you instantiate the EPCS peripheral a small on-chip memory comes with it. This is populated with boot-loader code that boots an .elf file out of EPCS (if one is present). This code is always there, sitting waiting to be executed. It is located at the base address of the EPCS peripheral that you type into SOPCB. So.. if you make a nios system that boots instead to a small on-chip memory, does a timer-start, and then unconditionally brances to the base address of EPCS (I guess the easiest way to do this is with some inline assembly code), it will execute the same boot-loader code which will examine the EPCS, copy the .elf sections to RAM as appropriate, and then jumps to execute that program. I am not sure of the exact steps we do to slice up the .elf during flash proramming, but there is a concept of data and where that data should be stored (which addresses in memory.. whether that be SDRAM, SRAM,. etc., as controlled by the linker settings for your application). This is all stored in the .elf. The flash programmer writes this information into flash as necessary. When the boot loader comes along, it sees these records and copies data to ram addresses as specfied. Sorry that I cannot be more specific than that; that is the level of abstraction that I'm currently familiar with. FYI, the boot-loader code I'm referring to is available in the components/altera_nios2/sdk/src/boot_loader_sources/boot_loader_epcs.bits.S file. This can probably be used to educate you a bit more about the boot-process than I can type here. This is also a file that has been patched per a big with it in Nios II 1.1... a patch is available on the Nios II errata site on altera.com - Altera_Forum
Honored Contributor
Ok Here is console with EPCS16 error
make: Entering directory `/cygdrive/d/ALTERA_PRJ/CYCLC6/lancelot/software/hello_led_3/Debug' Jan 12, 2005 3:53:30 PM - (INFO) nios2-flash-programmer: Launching Quartus Programmer to download: c:/altera/kits/nios2/components/AlexBoard/system/AlexBoard.sof Unrecognized EPCS device ID: 20 Jan 12, 2005 3:53:35 PM - (SEVERE) nios2-flash-programmer: Error opening target hardware Jan 12, 2005 3:53:35 PM - (SEVERE) nios2-flash-programmer: Unable to open flash-device after successfully communicating with target. It is likely that you are using a flash-programming FPGA design which was not created for your target board. In order to program flash, you must first create a purpose-built flash-programming design (i.e. FPGA configuration) and associate it with your particular board. The Nios development kit is delivered with purpose-built flash-programming designs pre-built for several development boards. If you wish to program flash on your own board, you must first create a flash-programming design. The process of creating a flash-programming design for your board is mostly automated. From a bash-shell, execute this script: mk_target_board --help The help-message includes references to other documentation on programming flash and targeting Nios systems to custom board designs. - exiting. make: *** [epcs_controller_boot_rom_programflash] Error 6 make: Leaving directory `/cygdrive/d/ALTERA_PRJ/CYCLC6/lancelot/software/hello_led_3/Debug' So what you think? Whats wrong ? - Altera_Forum
Honored Contributor
It appears that only the EPCS1 and EPCS4 devices are supported by the Flash Programmer....currently.
- slacker