Forum Discussion
Altera_Forum
Honored Contributor
21 years agoRick,
When you instantiate the EPCS peripheral a small on-chip memory comes with it. This is populated with boot-loader code that boots an .elf file out of EPCS (if one is present). This code is always there, sitting waiting to be executed. It is located at the base address of the EPCS peripheral that you type into SOPCB. So.. if you make a nios system that boots instead to a small on-chip memory, does a timer-start, and then unconditionally brances to the base address of EPCS (I guess the easiest way to do this is with some inline assembly code), it will execute the same boot-loader code which will examine the EPCS, copy the .elf sections to RAM as appropriate, and then jumps to execute that program. I am not sure of the exact steps we do to slice up the .elf during flash proramming, but there is a concept of data and where that data should be stored (which addresses in memory.. whether that be SDRAM, SRAM,. etc., as controlled by the linker settings for your application). This is all stored in the .elf. The flash programmer writes this information into flash as necessary. When the boot loader comes along, it sees these records and copies data to ram addresses as specfied. Sorry that I cannot be more specific than that; that is the level of abstraction that I'm currently familiar with. FYI, the boot-loader code I'm referring to is available in the components/altera_nios2/sdk/src/boot_loader_sources/boot_loader_epcs.bits.S file. This can probably be used to educate you a bit more about the boot-process than I can type here. This is also a file that has been patched per a big with it in Nios II 1.1... a patch is available on the Nios II errata site on altera.com