Honored ContributorHow to design the memorysize of the onchip memory?
when i was compilating my design , i saw a message "Error: Selected device has 105 RAM location(s) of type M4K. However, the current design needs more than 105 to successfully fit" My chip is EP2C35F672C6 Cyclon II family
Honored ContributorThe Cyclone II EP2C35 has 105 M4K OnChip memory blocks. Each M4K has 4096 bits + 512 parity bits. Speaking of bytes, each M4K block has 512bytes (no parity), so if you use more than the available memory blocks, your design requires more than 105 x 512 bytes.
so you have 3 options. 1. use a bigger fpga if possible 2. reduce the memory usage 3. check the quartus settings, maybe some memory blocks can be swaped to registers.Honored Contributorthank you for your suggest.
I have already solve the problem. I build the Frash memory to solve it. thank you again. --- Quote Start --- The Cyclone II EP2C35 has 105 M4K OnChip memory blocks. Each M4K has 4096 bits + 512 parity bits. Speaking of bytes, each M4K block has 512bytes (no parity), so if you use more than the available memory blocks, your design requires more than 105 x 512 bytes. so you have 3 options. 1. use a bigger fpga if possible 2. reduce the memory usage 3. check the quartus settings, maybe some memory blocks can be swaped to registers. --- Quote End ---Honored ContributorHonored ContributorHonored ContributorI looked at the settings but i didn't found how to swap block memory to register. Can you please tell how me i do that.
