Which Memory Timing information should be used in DDR4 EMIF IP for Stratix 10 if using a higher speed grade memory device at a lower speed - the higher speed grade or the lower speed grade?

Hi sstrell,

Thanks for that. And I believe that the Memory CAS latency and Memory Write CAS latency settings would depend on the speed at which we are running the core (2400 MT/s in this case). Please correct me if you find that incorrect.

Thanks,

Naved

Hi BoonT_Intel and sstrell,

Thanks for your reply. I will be using using the speed grade of the device in the timing information in the "Parameters dependent on Speed Bin" section of the "Mem Timing" tab of the EMIF IP. Also, for the "Parameters dependednt on Speed Bin, Operating Frequency, and Page size", I would be using the parameters depending on the operating frequency and the page size of the device used.

However, I am still not sure about the "Latency and Burst" section in "Memory" tab of the EMIF IP. I want to write the correct "Memory CAS latency setting" and "Memory write CAS latency setting". I need to dig in more into the details... please let me know your thoughts on that.

-Naved

Hi BoonT_Intel,

Yes. I can get these settings fromt he memory vendor. However, I see different settings "Memory CAS latency" and "Memory write CAS latency" depending on different speed bins. If the device is of 3200 speed bin but we are operating it at 2400 speed bin, then which of values should I enter while configuring the IP CAS values for 2400 or for 3200?

Thanks,

Naved

Hi BoonT_Intel,

Thanks a lot for your input. I'll get back to this thread soon. :)

Thanks,

Naved