Viterbi License Requirements

Hi Brian,

"Warning(18395): "Low Speed Viterbi Decoder" does not support the Intel FPGA IP Evaluation Mode feature"

Can you check by disabling the evaluation mode?

Refer the "1.6 Disable Intel FPGA IP Evaluation Mode" from following link,

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/an/an320.pdf

"Warning(115005): Unlicensed IP: "Low Speed Viterbi Decoder(6AF7 0038)"

also check the license status,

Refer the "1.2 Viewing IP Core License Status " from above link.

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards

Vikas Jathar

(This message was posted on behalf of Intel Corporation)

You have to fully read the question.

This issue is the Parallel Viterbi is looking for the Hybrid license. All that should be need is IP-VITERBI/HS. Not that plus IP-VITERBI/SS.

Quartus is yelling that IP-VITERBI/SS is missing. What is the dependency?

We had our FAE cut us an eval license and we can compile successfully with the /SS added to the /HS.

Thanks

-Brian

Hi Brian,

I tried to replicate your issue with Q17.1 pro but I could not face any issue.

Can you please provide your project file(may have different IPs used) so that we can replicate & fix if we found any bug?

Best Regards

Vikas Jathar

(This message was posted on behalf of Intel Corporation

Hi Vikas,

I am the local Altera-dedicated FAE at Arrow working with Brian. I was able to replicate the customer's problem when using 18.1 Pro. Make sure you disable your super license or at least comment out the Viterbi/SS core from your license file. Attached is a test archive you can use to try and re-create the problem.

Steve

If you have a super license the feature ID for the Viterbi/SS is 6AF7_0038 - comment out those lines to get the problem to happen

Hi Brian/Steve,

Can I get some favor like, could you please provide screenshot of 'Analysis & Synthesis IP Cores Summary' .

Regards,

Vikas

Hi Vikas,

I just built the design again (the one that Brian attached earlier) using Quartus Pro 18.1.1 and here is the message I get when running the assembler ->

Warning(115005): Unlicensed IP: "Low Speed Viterbi Decoder(6AF7 0038)"

Warning(115004): Unlicensed encrypted design file: "C:/altera_trn/_Customer_Designs/Syncopated Engineering/top_viterbi/qdb/_compiler/top/root_partition/18.1.1/final/1/netlist.model"

Warning(115004): Unlicensed encrypted design file: "C:/altera_trn/_Customer_Designs/Syncopated Engineering/top_viterbi/qdb/_compiler/top/root_partition/18.1.1/final/1/names.model"

Warning(115003): Can't generate programming files for your current project because you do not have a valid license for the following IP core or cores.

Warning(115005): Unlicensed IP: "Low Speed Viterbi Decoder(6AF7 0038)"

Warning(115004): Unlicensed encrypted design file: "C:/altera_trn/_Customer_Designs/Syncopated Engineering/top_viterbi/qdb/_compiler/top/root_partition/18.1.1/final/1/netlist.model"

Warning(115004): Unlicensed encrypted design file: "C:/altera_trn/_Customer_Designs/Syncopated Engineering/top_viterbi/qdb/_compiler/top/root_partition/18.1.1/final/1/names.model"

Steve

Hi Steve,

Thanks for the details.

I tried to replicate the issue using given design files but I am not able to do so & reason is floating license.

here I don`t have option to use only IP-Viterbi/HS , for that I should have standstill license for IP-Viterbi/HS in that case I may replicate the issue.

I will try to check internally & get back to you.

Please have a look to the screenshots.

• with license

• without license

Regards,

Vikas

Hi Vikas,

Even though you have a floating license you (or whomever manages the license) can temporarily comment out the Viterbi/SS license. If you have a super license the feature ID for the Viterbi/SS is 6AF7_0038 - comment out those lines to get the problem to happen

Steve

Hi Steve,

Actually It`s a bug.

Please check the below latest KDB link & let me know if this has helped to resolve your issue,

https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/tools/2019/why-does-the-viterbi-intel--fpga-ip-need-both-high-speed-and-low.html

Regards,

Vikas